Datasheet Analog Devices ADGS1412BCPZ — 数据表

FEATURES FUNCTIONAL BLOCK DIAGRAM SPI interface with error detection
Includes CRC, invalid read/write address, and SCLK count
error detection
Supports burst mode and daisy-chain mode
Industry-standard SPI Mode 0 and Mode 3 interface compatible
Guaranteed break-before-make switching allowing external
wiring of switches to deliver multiplexer configurations
1.5 Ω typical on resistance at 25°C
0.3 Ω typical on resistance flatness at 25°C
0.1 Ω typical on resistance match between channels at 25°C
VSS to VDD analog signal range
Fully specified at ±15 V, ±5 V, and +12 V
1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V
24-lead LFCSP ADGS1412
S1 D1 S2 D2 S3 D3 S4 D4
SPI
INTERFACE SCLK SDI CS SDO RESET/VL 14960-001 Data Sheet SPI Interface, 1.5 Ω RON, ±15 V/+12 V,
Quad SPST Switch, Mux Configurable
ADGS1412 Figure 1. APPLICATIONS
Automated test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems …