Datasheet LTC7890 (Analog Devices) - 9

制造商Analog Devices
描述Low IQ, Dual, 2-Phase Synchronous Step-Down Controller for GaN FETs in 40-Lead QFN (6mm x 6mm, Plastic Side Wettable) package
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LTC7890. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. Table 3. Pin Function Descriptions (Continued). Pin No. Mnemonic

LTC7890 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 3 Pin Function Descriptions (Continued) Pin No Mnemonic

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Data Sheet
LTC7890 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 3. Pin Function Descriptions (Continued) Pin No. Mnemonic Description
35 VPRG1 Output Voltage Control Pin for Channel 1. VPRG1 sets the adjustable output mode for Channel 1 using the external feedback resistors or the fixed 12 V or 5 V output mode. Floating VPRG1 programs the output from 0.8 V to 60 V with an external resistor divider, regulating VFB1 to 0.8 V. Connect VPRG1 to INTVCC or GND to program the output to 12 V or 5 V, respectively, through an internal resistor divider on VFB1. 36 TRACK/SS1 External Tracking/Soft Start Input for Channel 1. TRACK/SS1 regulates the VFB1 voltage to the lesser of 0.8 V or the voltage on the TRACK/SS1 pin. An internal 12 µA pull-up current source is connected to TRACK/SS1. A capacitor to GND at TRACK/SS1 sets the ramp time to the final regulated output voltage. The ramp time is equal to 1 ms for every 12.5 nF of capacitance. Alternatively, a resistor divider on another voltage supply connected to TRACK/SS1 allows the output to track the other supply during startup. 37 ITH1 Error Amplifier Output and Switching Regulator Compensation Point for Channel 1. The current comparator trip point increases with this control voltage. 38 VFB1 Error Amplifier Feedback Input for Channel 1. If VPRG1 is floating, VFB1 receives the remotely sensed feedback voltage for Channel 1 from an external resistive divider across the output. If VPRG1 is tied to GND or INTVCC, VFB1 receives the remotely sensed output voltage directly. 39 SENSE1+ Positive Input to the Differential Current Comparator for Channel 1. The ITH1 pin voltage and controlled offset between the SENSE1− and SENSE1+ pins, in conjunction with RSENSE, set the current trip threshold. 40 SENSE1− Negative Input to the Differential Current Comparator for Channel 1. The SENSE1− pin supplies current to the current comparator of Channel 1 when SENSE1– is greater than INTVCC. When SENSE1– is 3.2 V or greater, the pin supplies the majority of the sleep mode IQ instead of VIN, further reducing the input referred IQ. 41 GND (EPAD) Ground (Exposed Pad). The exposed pad must be soldered to PCB ground for rated electrical and thermal performance.
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Document Outline Features Applications Typical Application Circuit General Description Specifications Electrical Characteristics Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Functional Diagram Main Control Loop Power and Bias Supplies (VIN, EXTVCC, DRVCC, and INTVCC) High-Side Bootstrap Capacitor Dead Time Control (DTCA and DTCB Pins) Startup and Shutdown (RUNx and TRACK/SSx Pins) Light Load Operation: Burst Mode Operation, Pulse Skipping Mode, or Forced Continuous Mode (MODE Pin) Frequency Selection, Spread Spectrum, and Phase-Locked Loop (FREQ and PLLIN/SPREAD Pins) Output Overvoltage Protection Foldback Current Power-Good Applications Information Inductor Value Calculation Inductor Core Selection Current Sense Selection Low Value Resistor Current Sensing Inductor DCR Current Sensing Setting the Operating Frequency Selecting the Light Load Operating Mode Dead Time Control (DTCA and DTCB Pins) DTCx Pins Tied to GND (Adaptive Dead Time Control) DTCx Pins Tied to INTVCC (Smart Near Zero Dead Time Control) DTCx Pins Connected with a Resistor to GND Power FET Selection CIN and COUT Selection Setting the Output Voltage RUNx Pins and Undervoltage Lockout Soft Start and Tracking (TRACK/SSx Pin) 2-Phase Single Output Operation INTVCC Regulators (OPTI-DRIVE) Topside FET Driver Supply (CB) Minimum On-Time Considerations Fault Conditions: Current Limit and Foldback Fault Conditions: Overvoltage Protection Fault Conditions: Overtemperature Protection Phase-Locked Loop and Frequency Synchronization Efficiency Considerations Checking Transient Response Design Example PCB Layout Checklist PCB Layout Debugging Typical Applications Related Products Outline Dimensions Ordering Guide Evaluation Boards