Databrief PIC18-Q71 (Microchip) - 10

PIC18-Q71 Pin Diagrams Figure 2-7. 48-Pin TQFP
6 5 4 3 2 1 0 3 2 3 2 1 RC RC RC RD RD RD RD RC RC RF RF RF 48 47 46 45 44 43 42 41 40 39 38 37 RC7 1 36 RF0 RD4 2 35 RC1 RD5 3 34 RC0 RD6 4 33 RA6 RD7 5 32 RA7 VSS 6 31 VSS VDD 7 30 VDD RB0 8 29 RE2 RB1 9 28 RE1 RB2 10 27 RE0 RB3 11 26 RA5 12 RF4 25 RA4 13 14 15 16 17 18 19 20 21 22 23 24 5 6 7 4 5 6 7 3 0 1 2 3 RF RF RF RB RB RB RB RE RA RA RA RA / / / K R L AT L C D MC SP / SP C C PP I I V
Note: 
It is recommended that the exposed bottom pad be connected to VSS. © 2021 Microchip Technology Inc.
Product Brief
DS40002289A-page 10 Document Outline Introduction PIC18-Q71 Family Types Features Memory Operating Characteristics Power-Saving Functionality Digital Peripherals Analog Peripherals Clocking Structure Programming/Debug Features 1. Packages 2. Pin Diagrams 3. Pin Allocation Tables The Microchip Website Product Change Notification Service Customer Support Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service