Datasheet ADG5236 (Analog Devices) - 4

制造商Analog Devices
描述High Voltage Latch-Up Proof, Dual SPDT Switches
页数 / 页20 / 4 — ADG5236. Data Sheet. Parameter. 25°C. −40°C to +85°C −40°C to +125°C …
修订版B
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ADG5236. Data Sheet. Parameter. 25°C. −40°C to +85°C −40°C to +125°C Unit. Test Conditions/Comments. ±20 V DUAL SUPPLY

ADG5236 Data Sheet Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments ±20 V DUAL SUPPLY

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ADG5236 Data Sheet Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments
POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V IDD 45 µA typ Digital inputs = 0 V or VDD 55 70 µA max ISS 0.001 µA typ Digital inputs = 0 V or VDD 1 µA max VDD/VSS ±9/±22 V min/V max GND = 0 V 1 Guaranteed by design; not subject to production test.
±20 V DUAL SUPPLY
VDD = +20 V ± 10%, VSS = −20 V ± 10%, GND = 0 V, unless otherwise noted.
Table 2. Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VDD to VSS V max On Resistance, RON 140 Ω typ VS = ±15 V, IS = −1 mA, see Figure 25 160 200 230 Ω max VDD = +18 V, VSS = −18 V On-Resistance Match 1.3 Ω typ VS = ±15 V, IS = −1 mA Between Channels, ∆RON 8 9 10 Ω max On-Resistance Flatness, RFLAT (ON) 33 Ω typ VS = ±15 V, IS = −1 mA 45 55 60 Ω max LEAKAGE CURRENTS VDD = +22 V, VSS = −22 V Source Off Leakage, IS (Off) 0.01 nA typ VS = ±15 V, VD =  15 V, see Figure 27 0.1 0.2 0.4 nA max Drain Off Leakage, ID (Off) 0.01 nA typ VS = ±15 V, VD =  15 V, see Figure 27 0.1 0.4 1.2 nA max Channel On Leakage, ID (On), IS (On) 0.02 nA typ VS = VD = ±15 V, see Figure 24 0.2 0.4 1.2 nA max DIGITAL INPUTS Input High Voltage, VINH 2.0 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.002 µA typ VIN = VGND or VDD ±0.1 µA max Digital Input Capacitance, CIN 3 pF typ DYNAMIC CHARACTERISTICS1 Transition Time, tTRANSITION 150 ns typ RL = 300 Ω, CL = 35 pF 210 260 290 ns max VS = 10 V, see Figure 30 tON 150 ns typ RL = 300 Ω, CL = 35 pF 190 235 267 ns max VS = 10 V, see Figure 32 tOFF 155 ns typ RL = 300 Ω, CL = 35 pF 180 200 215 ns max VS = 10 V, see Figure 32 Break-Before-Make Time Delay, tD 60 ns typ RL = 300 Ω, CL = 35 pF 30 ns min VS1 = VS2 = 10 V, see Figure 31 Charge Injection, QINJ −0.6 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF, see Figure 33 Off Isolation −85 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 28 Channel-to-Channel Crosstalk −85 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 26 −3 dB Bandwidth 266 MHz typ RL = 50 Ω, CL = 5 pF, see Figure 29 Insertion Loss −7 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 29 Rev. B | Page 4 of 20 Document Outline Features Applications Functional Block Diagrams General Description Product Highlights Revision History Specifications ±15 V Dual Supply ±20 V Dual Supply 12 V Single Supply 36 V Single Supply Continuous Current per Channel, SxA, SxB, or Dx Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Truth Tables for Switches Typical Performance Characteristics Test Circuits Terminology Trench Isolation Applications Information Outline Dimensions Ordering Guide