Datasheet FDN337N (Fairchild) - 2

制造商Fairchild
描述N-Channel Logic Level Enhancement Mode Field Effect Transistor
页数 / 页5 / 2 — Electrical Characteristics. Symbol. Parameter. Conditions. Min. Typ. Max. …
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Electrical Characteristics. Symbol. Parameter. Conditions. Min. Typ. Max. Units. OFF CHARACTERISTICS. ON CHARACTERISTICS

Electrical Characteristics Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS ON CHARACTERISTICS

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Electrical Characteristics
(T = 25 OC unless otherwise noted ) A
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS
BV Drain-Source Breakdown Voltage V = 0 V, I = 250 µA 30 V DSS GS D ∆BV /∆T Breakdown Voltage Temp. Coefficient I = 250 µA, Referenced to 25 oC 41 mV/ oC DSS J D I Zero Gate Voltage Drain Current V = 24 V, V = 0 V 1 µA DSS DS GS T = 55°C 10 µA J I Gate - Body Leakage, Forward V = 8 V,V = 0 V 100 nA GSSF GS DS I Gate - Body Leakage, Reverse V = -8 V, V = 0 V -100 nA GSSR GS DS
ON CHARACTERISTICS
(Note) V Gate Threshold Voltage V = V , I = 250 µA 0.4 0.7 1 V GS(th) DS GS D ∆V /∆T Gate Threshold Voltage Temp. Coefficient I = 250 µA, Referenced to 25 oC -2.3 mV/ oC GS(th) J D R Static Drain-Source On-Resistance V = 4.5 V, I = 2.2 A 0.054 0.065 Ω DS(ON) GS D T =125°C 0.08 0.11
J
V = 2.5 V, I = 2 A 0.07 0.082 GS D I On-State Drain Current V = 4.5 V, V = 5 V 10 A D(ON) GS DS g Forward Transconductance V = 5 V, I = 2.2 A 13 S FS DS D
DYNAMIC CHARACTERISTICS
C Input Capacitance V = 10 V, V = 0 V, 300 pF iss DS GS f = 1.0 MHz C Output Capacitance 145 pF oss C Reverse Transfer Capacitance 35 pF rss
SWITCHING CHARACTERISTICS
(Note) t Turn - On Delay Time V = 5 V, I = 1 A, 4 10 ns D(on) DD D V = 4.5 V, R = 6 Ω t Turn - On Rise Time GS GEN 10 18 ns r t Turn - Off Delay Time 17 28 ns D(off) t Turn - Off Fall Time 4 10 ns f Q Total Gate Charge V = 10 V, I = 2.2 A, 7 9 nC g DS D V = 4.5 V GS Q Gate-Source Charge 1.1 nC gs Q Gate-Drain Charge 1.9 nC gd
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I Maximum Continuous Drain-Source Diode Forward Current 0.42 A S V Drain-Source Diode Forward Voltage V = 0 V, I = 0.42 A (Note) 0.65 1.2 V SD GS S Note: 1. Rθ is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R is guaranteed by JA θJC design while Rθ is determined by the user's board design. CA Typical Rθ using the board layouts shown below on FR-4 PCB in a still air environment : JA Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. a. 250oC/W when mounted on a b. 270oC/W when mounted on 0.02 in2 pad of 2oz Cu. a 0.001 in2 pad of 2oz Cu. FDN337N Rev.C