Datasheet FDN337N (Fairchild)
| 制造商 | Fairchild |
| 描述 | N-Channel Logic Level Enhancement Mode Field Effect Transistor |
| 页数 / 页 | 5 / 1 — FDN337N N-Channel Logic Level Enhancement Mode Field Effect Transistor … |
| 文件格式/大小 | PDF / 283 Kb |
| 文件语言 | 英语 |
FDN337N N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features. SOT-23. SuperSOTTM-6
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文件文字版本
March 1998
FDN337N N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features
SuperSOTTM-3 N-Channel logic level enhancement mode 2.2 A, 30 V, R = 0.065 Ω @ V = 4.5 V DS(ON) GS power field effect transistors are produced using Fairchild's R = 0.082 Ω @ V = 2.5 V. DS(ON) GS proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize Industry standard outline SOT-23 surface mount on-state resistance.
These devices are particularly suited for package using proprietary SuperSOTTM-3 design for low voltage applications in notebook computers, portable superior thermal and electrical capabilities. phones, PCMCIA cards, and other battery powered circuits High density cell design for extremely low R . DS(ON) where fast switching, and low in-line power loss are needed in a very small outline surface mount package. Exceptional on-resistance and maximum DC current capability.
SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 D
D
337 S G
G S
SuperSOT -3 TM Absolute Maximum Ratings
T = 25oC unless other wise noted
A
Symbol Parameter FDN337N Units
V Drain-Source Voltage 30 V DSS V Gate-Source Voltage - Continuous ±8 V GSS I Drain/Output Current - Continuous 2.2 A D - Pulsed 10 P Maximum Power Dissipation (Note 1a) 0.5 W D (Note 1b) 0.46 T ,T Operating and Storage Temperature Range -55 to 150 °C J STG
THERMAL CHARACTERISTICS
Rθ Thermal Resistance, Junction-to-Ambient (Note 1a) 250 °C/W JA Rθ Thermal Resistance, Junction-to-Case (Note 1) 75 °C/W JC © 1998 Fairchild Semiconductor Corporation FDN337N Rev.C
FDN337N N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features
SuperSOTTM-3 N-Channel logic level enhancement mode 2.2 A, 30 V, R = 0.065 Ω @ V = 4.5 V DS(ON) GS power field effect transistors are produced using Fairchild's R = 0.082 Ω @ V = 2.5 V. DS(ON) GS proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize Industry standard outline SOT-23 surface mount on-state resistance.
These devices are particularly suited for package using proprietary SuperSOTTM-3 design for low voltage applications in notebook computers, portable superior thermal and electrical capabilities. phones, PCMCIA cards, and other battery powered circuits High density cell design for extremely low R . DS(ON) where fast switching, and low in-line power loss are needed in a very small outline surface mount package. Exceptional on-resistance and maximum DC current capability.
SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 D
D
337 S G
G S
SuperSOT -3 TM Absolute Maximum Ratings
T = 25oC unless other wise noted
A
Symbol Parameter FDN337N Units
V Drain-Source Voltage 30 V DSS V Gate-Source Voltage - Continuous ±8 V GSS I Drain/Output Current - Continuous 2.2 A D - Pulsed 10 P Maximum Power Dissipation (Note 1a) 0.5 W D (Note 1b) 0.46 T ,T Operating and Storage Temperature Range -55 to 150 °C J STG
THERMAL CHARACTERISTICS
Rθ Thermal Resistance, Junction-to-Ambient (Note 1a) 250 °C/W JA Rθ Thermal Resistance, Junction-to-Case (Note 1) 75 °C/W JC © 1998 Fairchild Semiconductor Corporation FDN337N Rev.C