Datasheet RAA788150, RAA788152, RAA788153, RAA788155, RAA788156, RAA788158 (Renesas) - 10
| 制造商 | Renesas |
| 描述 | Large 3V Output Swing, 5kV EFT, 16.5kV ESD, RS-485 Transceivers |
| 页数 / 页 | 34 / 10 — RAA788150, RAA788152, RAA788153, RAA788155, RAA788156, RAA788158 … |
| 文件格式/大小 | PDF / 613 Kb |
| 文件语言 | 英语 |
RAA788150, RAA788152, RAA788153, RAA788155, RAA788156, RAA788158 Datasheet. Temp. Parameter. Symbol. Test Conditions. (°C). Min[2]
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RAA788150, RAA788152, RAA788153, RAA788155, RAA788156, RAA788158 Datasheet
Test Conditions: VCC = 4.5V to 5.5V; unless otherwise specified. Typical values are at VCC = 5V, TA = +25°C[1].
Temp Parameter Symbol Test Conditions (°C) Min[2] Typ Max[2] Unit
Time to Shutdown[8] tSHDN Full 60 160 600 ns Receiver Enable from tZH(SHDN) RL = 1kΩ, CL = 15pF, Full - - 200 ns Shutdown to Output High SW = GND[8][11] (Figure 9) Receiver Enable from tZL(SHDN) RL = 1kΩ, CL = 15pF, Full - - 200 ns Shutdown to Output Low SW = V [8][11] CC (Figure 9) 1. All currents in to device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 2. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 3. See Figure 11 for more information and for performance over temperature. 4. Applies to peak current. See Typical Performance Curves for more information. 5. Supply current specification is valid for loaded drivers when DE = 0V. 6. Limits established by characterization and are not production tested. 7. Keep RE = 0 to prevent the device from entering SHDN. 8. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are ensured not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are ensured to have entered shutdown. See Low Current Shutdown Mode. 9. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN. 10. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN. 11. Set the RE signal high time >600ns to ensure that the device enters SHDN. R15DS0005EU0102 Rev.1.02 Page 10 Aug 19, 2021 Document Outline Features Applications Contents 1. Overview 1.1 Typical Operating Circuit 2. Pin Information 2.1 Pin Assignments 2.2 Pin Descriptions 3. Specifications 3.1 Absolute Maximum Ratings 3.2 Recommended Operating Conditions 3.3 Thermal Information 3.4 Electrical Specifications 4. Test Circuits and Waveforms 5. Typical Performance Curves 6. Device Description 6.1 Overview 6.2 Functional Block Diagram 6.3 Operating Modes 6.3.1 Driver Operation 6.3.2 Receiver Operation 6.4 Device Features 6.4.1 Large Output Signal Swing 6.4.2 Driver Overload Protection 6.4.3 Full-Failsafe Receiver 6.4.4 Low Current Shutdown Mode 6.4.5 Hot Plug Function 6.4.6 High EFT Immunity 6.4.7 High ESD Protection 7. Application Information 7.1 Network Design 7.1.1 Cable Type 7.1.2 Cable Length vs Data Rate 7.1.3 Topologies and Stub Lengths 7.1.4 Minimum Distance between Nodes 7.1.5 Failsafe Biasing Termination 7.2 Transient Protection 7.3 Layout Guidelines 7.3.1 Layout Example 8. Package Outline Drawings 9. Ordering Information 10. Revision History
RAA788150, RAA788152, RAA788153, RAA788155, RAA788156, RAA788158 Datasheet
Test Conditions: VCC = 4.5V to 5.5V; unless otherwise specified. Typical values are at VCC = 5V, TA = +25°C[1].
Temp Parameter Symbol Test Conditions (°C) Min[2] Typ Max[2] Unit
Time to Shutdown[8] tSHDN Full 60 160 600 ns Receiver Enable from tZH(SHDN) RL = 1kΩ, CL = 15pF, Full - - 200 ns Shutdown to Output High SW = GND[8][11] (Figure 9) Receiver Enable from tZL(SHDN) RL = 1kΩ, CL = 15pF, Full - - 200 ns Shutdown to Output Low SW = V [8][11] CC (Figure 9) 1. All currents in to device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 2. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 3. See Figure 11 for more information and for performance over temperature. 4. Applies to peak current. See Typical Performance Curves for more information. 5. Supply current specification is valid for loaded drivers when DE = 0V. 6. Limits established by characterization and are not production tested. 7. Keep RE = 0 to prevent the device from entering SHDN. 8. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are ensured not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are ensured to have entered shutdown. See Low Current Shutdown Mode. 9. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN. 10. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN. 11. Set the RE signal high time >600ns to ensure that the device enters SHDN. R15DS0005EU0102 Rev.1.02 Page 10 Aug 19, 2021 Document Outline Features Applications Contents 1. Overview 1.1 Typical Operating Circuit 2. Pin Information 2.1 Pin Assignments 2.2 Pin Descriptions 3. Specifications 3.1 Absolute Maximum Ratings 3.2 Recommended Operating Conditions 3.3 Thermal Information 3.4 Electrical Specifications 4. Test Circuits and Waveforms 5. Typical Performance Curves 6. Device Description 6.1 Overview 6.2 Functional Block Diagram 6.3 Operating Modes 6.3.1 Driver Operation 6.3.2 Receiver Operation 6.4 Device Features 6.4.1 Large Output Signal Swing 6.4.2 Driver Overload Protection 6.4.3 Full-Failsafe Receiver 6.4.4 Low Current Shutdown Mode 6.4.5 Hot Plug Function 6.4.6 High EFT Immunity 6.4.7 High ESD Protection 7. Application Information 7.1 Network Design 7.1.1 Cable Type 7.1.2 Cable Length vs Data Rate 7.1.3 Topologies and Stub Lengths 7.1.4 Minimum Distance between Nodes 7.1.5 Failsafe Biasing Termination 7.2 Transient Protection 7.3 Layout Guidelines 7.3.1 Layout Example 8. Package Outline Drawings 9. Ordering Information 10. Revision History