June 2009FDV301N Digital FET , N-ChannelGeneral Description Features 25 V, 0.22 A continuous, 0.5 A Peak. This N-Channel logic level enhancement mode field effect transistor is produced using Fairchild's proprietary, high cell R = 5 Ω @ V = 2.7 V DS(ON) GS density, DMOS technology. This very high density process is R = 4 Ω @ V = 4.5 V.
DS(ON) GS especially tailored to minimize on-state resistance. This Very low level gate drive requirements allowing direct device has been designed especially for low voltage operation in 3V circuits. V < 1.06V. applications as a replacement for digital transistors. Since GS(th) bias resistors are not required, this one N-channel FET can Gate-Source Zener for ESD ruggedness. replace several different digital transistors, with different bias >6kV Human Body Model resistor values. Replace multiple NPN digital transistors with one DMOS FET. SOT-23SuperSOTTM-6SuperSOTTM-8SO-8SOT-223SOIC-16Mark:301I N V E R T E R A P P L I C A T I O N Vcc D D OUT IN G S G S GND Absolute Maximum Ratings T = 25oC unless other wise noted