June 2009 FDV301N
Digital FET , N-Channel
General Description Features This N-Channel logic level enhancement mode field effect
transistor is produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance. This
device has been designed especially for low voltage
applications as a replacement for digital transistors. Since
bias resistors are not required, this one N-channel FET can
replace several different digital transistors, with different bias
resistor values. 25 V, 0.22 A continuous, 0.5 A Peak.
RDS(ON) = 5 Ω @ VGS= 2.7 V
RDS(ON) = 4 Ω @ VGS= 4.5 V.
Very low level gate drive requirements allowing direct
operation in 3V circuits. VGS(th) < 1.06V.
Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model
Replace multiple NPN digital transistors with one DMOS
FET. SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOIC-16 SOT-223 Mark:301
INVERTER APPLICATION Vcc D
D OUT IN G Absolute Maximum Ratings
Symbol G S
GND S TA = 25oC unless other wise noted Parameter FDV301N Units VDSS, VCC Drain-Source Voltage, Power Supply Voltage 25 V VGSS, VI Gate-Source Voltage, VIN 8 V ID, IO Drain/Output Current 0.22 A -Continuous 0.5
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