Datasheet LTC4101 (Analog Devices) - 10

制造商Analog Devices
描述Smart Battery Charger Controller
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TEST CIRCUIT. OPERATION. Overview (Refer to Block Diagram). Battery Charger Controller

TEST CIRCUIT OPERATION Overview (Refer to Block Diagram) Battery Charger Controller

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LTC4101
TEST CIRCUIT
LTC4101 1.19V + – EA VBAT – VVDAC – V • 100 + TOL = VVDAC V FOR V DAC VDAC = 4.176V(0 x 1050) 21 22 18 19 CSP BAT V DCIN = 21V SET BAT ITH CLN = CLP = 20V + LT1055 – V 0.7V DD = 3.3V 4101 TC01
OPERATION Overview (Refer to Block Diagram)
the commands exceed the programmed limits these limits are substituted and overrange fl ags are set. The LTC4101 is composed of a battery charger section, a charger controller, a 10-bit DAC to control charger current, The charger controller will assert SMBALERT whenever an 11-bit DAC to control charger voltage, a SafetySignal a status change is detected, namely: AC_PRESENT, BAT- decoder, limit decoder and an SMBus controller block. If TERY_PRESENT, ALARM_INHIBITED, or VDD power-fail. no battery is present, the SafetySignal decoder indicates The host may query the charger, via the SMBus, to obtain a RES_OR condition and charging is disabled by the ChargerStatus() information. SMBALERT will be deasserted charger controller (CHGEN = Low). Charging will also be upon a successful read of ChargerStatus() or a successful disabled if DCDIV is low, or the SafetySignal is decoded Alert Response Address (ARA) request. as RES_HOT. If a battery is inserted and AC power is connected, the battery will be charged with an 80mA
Battery Charger Controller
“wake-up” current. The wake-up current is discontinued The LTC4101 charger controller uses a constant off-time, after tTIMEOUT if the SafetySignal is decoded as RES_UR current mode step-down architecture. During normal or RES_C0LD, and the battery or host doesn’t transmit operation, the top MOSFET is turned on each cycle when charging commands. the oscillator sets the SR latch and turned off when the The SMBus interface and control block receives Charg- main current comparator ICMP resets the SR latch. While ingCurrent() and ChargingVoltage() commands via the the top MOSFET is off, the bottom MOSFET is turned SMBus. If ChargingCurrent() and ChargingVoltage() on until either the inductor current trips the current command pairs are received within a t comparator I TIMEOUT interval, the REV, or the beginning of the next cycle. values are stored in the current and voltage DACs and the The oscillator uses the equation, charger controller asserts the CHGEN line if the decoded (VDCIN – VBAT) SafetySignal value will allow charging to commence. Charg- tOFF = (V ingCurrent() and ChargingVoltage() values are compared DCIN • fOSC ) against limits programmed by the limit decoder block; if 4101fa 10