Datasheet LYTSwitch-6 (Power Integrations) - 15

LYTSwitch-6 PCB Layout Example
Output loop formed by Input circuit (F1, RV1, BR1) Flyback primary loop COUT C37//C15, sense Feedback components and EMI filter- C1, L2, C2, formed by bulk capacitor C4, Primary clamp loop resistors R24//R43 and R29, R30, C19 and GND pin and L3 are positioned away primary-winding NP and area formed by D8, LYTSwitch-6 IS-GND pin share one ground path that from any switching nodes LYTSwitch-6 U4 D-S pin is R46, C9//R17 and NP does not share ground path is star-connected to sense with high di/dt or dv/dt. tight and small. is tight and small. with secondary loop (4). resistor R24//R43. PFC loop formed by filter Bias supply loop Primary signal Secondary signal Secondary loop C3, free-wheel diode formed by aux components C11, R18, components are placed formed by D1+D17, T1, primary- winding NB, D7 and R45 and R4 are placed as close as possible to secondary winding winding NP and bulk cap C10 is tight and small. as close as possible to IC IC pin to which they are FL1-FL2, COUT C4 is tight and small. pin to which they are connected with short C15//C37 and connected to with traces. Aux winding rectifier D10 is tight short traces. FL3-FL4, D11 and C38 and small. is tight and small.
OUTPUT PFC Inductor Inductor Filter CMC Filter Flyback Transformer Output Capacitor Bulk Capacitor MOV AC INPUT
Copper heat sink for Y capacitor connected SOURCE pin is maximized. to RTN and C4 (-).
Special Notes
• All loops are separated; no loop is inside a loop. This will avoid ground impedance noise coupling. • Maintain trace surface area and length of high dv/dt nodes such as DRAIN, as small and short as possible to minimized RFI generation. • No signal trace (quiet trace) such as Y capacitor and feedback return must be routed near or across noisy nodes (high dv/dt or di/dt) such as DRAIN, underneath transformer belly, switching side of any winding or output rectifier diode to avoid capactively or magnetically coupled noise. • No signal trace must share path with traces having an AC switching current such as output capacitor. Connection must be star-connected to capacitor pad in order to avoid ground impedance coupled noise. PI-8585-012318 Figure 14. TOP and BOTTOM Sides – Ideal Layout Example Showing Tight Loop Areas for Circuit with High dv/dt and di/dt, Component Placement.
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Rev. E 02/18 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description LYTSwitch-6 Functional Description Primary Controller Secondary Controller Application Example Key Applications Design Considerations Primary-Side Components of LYTSwitch-6 Secondary-Side Components of f LYTSwitch-6 Recommendations for Circuit Board Layout Recommended Position of InSOP-24D Package with Respect to Transformer Quick Design Checklist Other Applications Design Example PCB Layout Example Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Curves InSOP-24D Package Drawing MSL Table ESD and Latch-Up Table Part Ordering Information