Datasheet LT3492 (Analog Devices) - 9

制造商Analog Devices
描述Triple Output LED Driver with 3000:1 PWM Dimming
页数 / 页22 / 9 — APPLICATIONS INFORMATION Operation. Loop Compensation. PWM Dimming Control
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APPLICATIONS INFORMATION Operation. Loop Compensation. PWM Dimming Control

APPLICATIONS INFORMATION Operation Loop Compensation PWM Dimming Control

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LT3492
APPLICATIONS INFORMATION Operation
A7 limits ISP1-TG1 to 6.5V to protect the gate of M1. If the PWM1 pin is pulled low, Q1 is turned off. Converter 1 The LT3492 uses a fi xed frequency, current mode control stops operating, M1 is turned off, disconnects the LED scheme to provide excellent line and load regulation. Op- array and stops current draw from output capacitor C2. The eration can be best understood by referring to the Block V Diagram in Figure 1. The oscillator, ramp generator, refer- C1 pin is also disconnected from the internal circuitry and draws minimal current from the compensation capacitor ence, internal regulator and UVLO are shared among the C three converters. The control circuitry, power switch etc., C. The VC1 pin and the output capacitor store the state of the LED current until PWM1 is pulled up again. This are replicated for each of the three converters. Figure 1 leads to a highly linear relationship between pulse width shows the shared circuits and only converter 1 circuits. and output light, and allows for a large and accurate dim- If the SHDN pin is logic low, the LT3492 is shut down ming range. A P-channel MOSFET with smaller total gate and draws minimal current from VIN. If the SHDN pin is charge (QG) improves the dimming performance, since logic high, the internal bias circuits turn on. The switching it can be turned on and off faster. Use a MOSFET with a regulators start to operate when their respective PWM QG lower than 10nC, and a minimum VTH of –1V to –2V. signal goes high. Don’t use a Low VTH PMOS. To optimize the PWM control The main control loop can be understood by following of all the three channels, the rising edge of all the three the operation of converter 1. The start of each oscillator PWM signals should be synchronized. cycle sets the SR latch, A3, and turns on power switch In the applications where high dimming ratio is not required, Q1. The signal at the noninverting input (SLOPE node) M1 can be omitted to reduce cost. In these conditions, of the PWM comparator A2 is proportional to the sum TG1 should be left open. The PWM dimming range can be of the switch current and oscillator ramp. When SLOPE further increased by using CTRL1 pin to linearly adjust the exceeds VC (the output of the error amplifi er A1), A2 resets current sense threshold during the PWM1 high state. the latch and turns off the power switch Q1 through A4 and A5. In this manner, A10 and A2 set the correct peak
Loop Compensation
current level to keep the output in regulation. Amplifi er Loop compensation determines the stability and transient A8 has two noninverting inputs, one from the 1V internal performance. The LT3492 uses current mode control to voltage reference and the other one from the CTRL1 pin. regulate the output, which simplifi es loop compensation. Whichever input is lower takes precedence. A8, Q3 and R2 To compensate the feedback loop of the LT3492, a series force V1, the voltage across R1, to be one tenth of either resistor-capacitor network should be connected from the 1V or the voltage of CTRL1 pin, whichever is lower. VSENSE V is the voltage across the sensing resistor, R C pin to GND. For most applications, the compensation SENSE, which is capacitor should be in the range of 100pF to 2.2nF. The com- connected in series with the LEDs. VSENSE is compared to pensation resistor is usually in the range of 5k to 50k. V1 by A1. If VSENSE is higher than V1, the output of A1 will decrease, thus reducing the amount of current delivered to To obtain the best performance, tradeoffs should be made LEDs. In this manner the current sensing voltage V in the compensation network design. A higher value of SENSE is regulated to V1. compensation capacitor improves the stability and dim- ming range (a larger capacitance helps hold the V Converters 2 and 3 are identical to converter 1. C voltage when the PWM signal is low). However, a large compen-
PWM Dimming Control
sation capacitor also increases the start-up time and the time to recover from a fault condition. Similarly, a larger The LED array can be dimmed with pulse width modulation compensation resistor improves the transient response using the PWM1 pin and an external P-channel MOSFET, but may reduce the phase margin. A practical approach M1. If the PWM1 pin is pulled high, M1 is turned on by is to start with one of the circuits in this data sheet that internal driver A7 and converter 1 operates nominally. 3492fa 9