Datasheet Analog Devices ADL7003 — 数据表

FUNCTIONAL BLOCK DIAGRAM
5 4 7 6 VDD4A 3 VDD3A VGG12A 2 VGG34A Gain: 14 dB typical
Noise figure: 5 dB typical
Input return loss (S11): 15 dB typical
Output return loss (S22): 20 dB typical
Output power for 1 dB compression (P1dB): 14 dBm typical
Saturated output power (PSAT): 18 dBm typical
Output third-order intercept (IP3): 21 dBm typical
Supply voltage: 3 V at 120 mA
50 Ω matched input/output
Die size: 1.9 mm × 1.9 mm × 0.05 mm VDD2A FEATURES VDD1A RFOUT 8 ADL7003 APPLICATIONS 13 12 11 VDD4B VDD3B
10 9 Figure 1. GENERAL DESCRIPTION
The ADL7003 is a gallium arsenide (GaAs), pseudomorphic
high electron mobility transistor (pHEMT), monolithic
microwave integrated circuit (MMIC), balanced low noise
amplifier that operates from 50 GHz to 95 GHz. In the lower
band of 50 GHz to 70 GHz, the ADL7003 provides 14 dB
(typical) of gain, 21 dBm output IP3, and 12 dBm of output
power for 1 dB gain compression. In the upper band of 70 GHz Rev. 0 to 90 GHz, the ADL7003 provides 15 dB (typical) of gain,
21 dBm output IP3, and 14 dBm of output power for1 dB gain
compression. The ADL7003 requires 120 mA from a 3 V supply.
The ADL7003 amplifier inputs/outputs are internally matched
to 50 Ω, facilitating integration into multichip modules (MCMs). …