Datasheet Analog Devices ADSP-21565 — 数据表

SHARC+ Single Core
High Performance DSP (Up to 1 GHz)
ADSP-21562/21563/21565 Preliminary Technical Data
SYSTEM FEATURES MEMORY Enhanced SHARC+ high performance floating-point core
Up to 1 GHz
Up to 5 Mb (640 kB) Level 1 (L1) SRAM memory with parity
(optional ability to configure as cache)
32-bit, 40-bit, and 64-bit floating-point support
32-bit fixed point
Byte, short-word, word, long-word addressed
Powerful DMA system
On-chip memory protection
Integrated safety features
17 mm × 17 mm 400 CSP_BGA (0.8 mm pitch), RoHS
compliant
120-lead LQFP_EP (0.4 mm pitch), RoHS compliant
Low system power across automotive temperature range Large on-chip Level 2 (L2) SRAM with ECC protection, up to
8 Mb (1 MB)
One Level 3 (L3) interface optimized for low system power,
providing 16-bit interface to DDR3/ DDR3L SDRAM devices SYSTEM CONTROL ADDITIONAL FEATURES
Security and Protection
Crypto hardware accelerators
Fast secure boot with IP protection …