Datasheet Analog Devices AD9517-0ABCPZ-RL7 — 数据表

12-Output Clock Generator with
Integrated 2.8 GHz VCO
AD9517-0 Data Sheet FUNCTIONAL BLOCK DIAGRAM APPLICATIONS
Low jitter, low phase noise clock distribution
10/40/100 Gb/sec networking line cards, including SONET,
Synchronous Ethernet, OTU2/3/4
Forward error correction (G.710)
Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
High performance wireless transceivers
ATE and high performance instrumentation GENERAL DESCRIPTION
The AD9517-0 1 provides a multi-output clock distribution
function with subpicosecond jitter performance, along with an
on-chip PLL and VCO. The on-chip VCO tunes from 2.55 GHz
to 2.95 GHz. Optionally, an external VCO/VCXO of up to
2.4 GHz can be used.
The AD9517-0 emphasizes low jitter and phase noise to
maximize data converter performance, and it can benefit other
applications with demanding phase noise and jitter requirements. Rev. E CP REFIN
REF2 LF STATUS
MONITOR
PLL REF1 SWITCHOVER
AND MONITOR Low phase noise, phase-locked loop (PLL)
On-chip VCO tunes from 2.55 GHz to 2.95 GHz …