Datasheet Analog Devices AD9522-5BCPZ-REEL7 — 数据表

12 LVDS/24 CMOS Output
Clock Generator
AD9522-5 Data Sheet
FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS CP REFIN CLK REF2 ZERO
DELAY DIVIDER
AND MUXES
LVDS/
CMOS
DIV/Φ OUT0
OUT1
OUT2 DIV/Φ OUT3
OUT4
OUT5 DIV/Φ OUT6
OUT7
OUT8 DIV/Φ OUT9
OUT10
OUT11 SPI/I2C CONTROL
PORT AND
DIGITAL LOGIC EEPROM AD9522-5 07240-001 REFIN STATUS
MONITOR PLL REF1 SWITCHOVER
AND MONITOR Low phase noise, phase-locked loop (PLL)
Supports external 3.3 V/5 V voltage controlled oscillator
(VCO)/VCXO to 2.4 GHz …