Datasheet Analog Devices AD9577BCPZ-RL — 数据表

Clock Generator with Dual PLLs,
Spread Spectrum, and Margining
AD9577 Data Sheet
FEATURES FUNCTIONAL BLOCK DIAGRAM
XT1
XT2 XTAL
OSC CMOS
REFOUT REFCLK
DIVIDE
1 OR 2 VCO
2.15GHz
TO
2.55GHz FEEDBACK
DIVIDER THIRD
ORDER LPF PLL2 LVPECL/LVDS
OR 2 × CMOS LVPECL/LVDS
OR 2 × CMOS LDO VCO
2.15GHz
TO
2.55GHz FEEDBACK
DIVIDER
SCL
SDA DIVIDERS DIVIDERS LDO I2C …