Datasheet Analog Devices AD9528BCPZ-REEL7 — 数据表

JESD204B Clock Generator with
14 LVDS/HSTL Outputs
AD9528 Data Sheet
FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS
High performance wireless transceivers
LTE and multicarrier GSM base stations
Wireless and broadband infrastructure
Medical instrumentation
Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs;
supports JESD204B
Low jitter, low phase noise clock distribution
ATE and high performance instrumentation VXCO_IN REFA
REFB PLL2 ÷ Ø OUT0/
OUT0 SYSREF
JESD204B ÷ Ø OUT13/
OUT13 PLL1 REF_SEL SYSREF_REQ CONTROL
INTERFACE
(SPI AND I2C) AD9528 CLOCK
DISTRIBUTION
14 OUTPUTS 12380-001 14 outputs configurable for HSTL or LVDS
Maximum output frequency
6 outputs up to 1.25 GHz
8 outputs up to 1 GHz …