Datasheet Analog Devices AD9514BCPZ-REEL7 — 数据表

1.6 GHz Clock Distribution IC,
Dividers, Delay Adjust, Three Outputs
AD9514
FEATURES
1.6 GHz differential clock input
3 programmable dividers
Divide-by in range from1 to 32
Phase select for coarse delay adjust
2 independent 1.6 GHz LVPECL clock outputs
Additive broadband output jitter 225 fs rms
1 independent 800 MHz/250 MHz LVDS/CMOS clock output
Additive broadband output jitter 300 fs rms/290 fs rms
Time delays up to 10 ns
Device configured with 4-level logic pins
Space-saving, 32-lead LFCSP FUNCTIONAL BLOCK DIAGRAM
RSET VS GND AD9514 LVPECL
OUT0 /1 . /32 OUT0B LVPECL
CLK OUT1
/1 . /32 CLKB OUT1B
LVDS/CMOS
OUT2
Δt /1 . /32 SYNCB OUT2B APPLICATIONS
SETUP LOGIC VREF S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 05596-001 Low jitter, low phase noise clock distribution …