Datasheet Analog Devices ADCLK925BCPZ-WP — 数据表

Ultrafast SiGe
ECL Clock/Data Buffers
ADCLK905/ADCLK907/ADCLK925 Data Sheet TYPICAL APPLICATION CIRCUITS 95 ps propagation delay
7.5 GHz toggle rate
60 ps typical output rise/fall
60 fs random jitter (RJ)
On-chip terminations at both input pins
Extended industrial temperature range: −40°C to +125°C
2.5 V to 3.3 V power supply (VCC − VEE) APPLICATIONS VREF VCC VT D Q D Q
06318-001 FEATURES VEE Figure 1. ADCLK905 ECL 1:1 Clock/Data Buffer Clock and data signal restoration and level shifting
Automated test equipment (ATE)
High speed instrumentation
High speed line receivers
Threshold detection
Converter clocking VREF 1
VT1
VCC
Q1 D1 Q1 D1 GENERAL DESCRIPTION VEE Q2 D2
VCC
VT2
VREF 2 Figure 2. ADCLK907 ECL Dual 1:1 Clock/Data Buffer VREF The buffers offer 95 ps propagation delay, 7.5 GHz toggle rate,
10 Gbps data rate, and 60 fs random jitter (RJ). VT The inputs have center tapped, 100 Ω, on-chip termination
resistors. A VREF pin is available for biasing ac-coupled inputs. D The ECL output stages are designed to directly drive 800 mV …