Datasheet Analog Devices ADCLK854BCPZ-REEL7 — 数据表

1.8 V, 12-LVDS/24-CMOS Output,
Low Power Clock Fanout Buffer
ADCLK854
FEATURES FUNCTIONAL BLOCK DIAGRAM 2 selectable differential inputs
Selectable LVDS/CMOS outputs
Up to 12 LVDS (1.2 GHz) or 24 CMOS (250 MHz) outputs 1 V/ns, unless otherwise noted.
Table 1. Clock Inputs and Outputs
Parameter
CLOCK INPUTS
Input Frequency
Input Sensitivity, Differential Symbol Min Typ 0 Input Resistance (Differential)
Input Capacitance
Input Bias Current (Each Pin)
LVDS CLOCK OUTPUTS
Output Frequency
Output Voltage Differential
Delta VOD
Offset Voltage
Delta VOS
Short-Circuit Current Unit 1200 MHz
mV p-p 150 Input Level
Input Common-Mode Voltage
Input Common-Mode Range …