Data Sheet Programmable Low Voltage
1:10 LVDS Clock Driver
ADN4670 FEATURES
Low output skew 100 mV, this
output sinks current. When the differential input voltage is between CLKx and CLKx < −100 mV, this
output sources current.
Noninverted Clock Output. When the differential input voltage is between CLKx and CLKx > 100 mV,
this output sources current. When the differential input voltage is between CLKx and CLKx < −100 mV,
this output sinks current.
Power Supply Input. This part can be operated from 2.375 V to 2.625 V. Rev. A | Page 7 of 12 ADN4670 Data Sheet THEORY OF OPERATION
PROGRAMMING The ADN4670 is a clock driver/expander for low voltage differential signaling (LVDS). It takes a differential clock signal of
typically 350 mV and expands it to 10 differential clock outputs
with very low skew (typically < 30 ps). The device receives a
differential current signal from a source such as a twisted pair
cable, which develops a voltage of typically ±350 mV across a
100 Ω terminating resistor. This signal passes via a differential
multiplexer to 10 drivers that each output a differential current
signal. Three control inputs are provided for programming the
ADN4670. EN is the enable input, which allows programming
when high, SI is the serial data input, and CK is the serial clock
input, which clocks data into the device on a low-to-high clock
transition. Each of these inputs has an internal pull-up or
pull-down resistor of 120 kΩ. EN and SI are pulled low if left …