Datasheet Linear Technology LTC3831EGN-1#PBF — 数据表

LTC3831-1
High Power Synchronous
Switching Regulator Controller
for DDR Memory Termination
U FEATURES
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в–  DESCRIPTIO The LTCВ®3831-1 is a high power, high efficiency switching regulator controller designed for DDR memory termination. The LTC3831-1 generates an output voltage equal
to 1/2 of an external supply or reference voltage. The
LTC3831-1 uses a synchronous switching architecture
with N-channel MOSFETs. Additionally, the chip senses
output current through the drain-source resistance of the
upper N-channel FET, providing an adjustable current
limit without a current sense resistor. VOUT as Low as 0.4V …