Datasheet Linear Technology LTC3718 — 数据表

制造商	Linear Technology
系列	LTC3718

低输入电压，DC / DC控制器，用于DDR / QDR存储器终端

数据表

PDF, 254 Kb, 修订版: A, 文件上传: Sep 22, 2017

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打包

	LTC3718EG#PBF	LTC3718EG#TRPBF
N	1	2
Package	SSOP-24 包装外形图	SSOP-24 包装外形图
Package Code	G	G
Package Index	05-08-1640 (G24)	05-08-1640 (G24)
Pin Count	24	24

参数化

Parameters / Models	LTC3718EG#PBF	LTC3718EG#TRPBF
Demo Boards	DC464A	DC464A
Design Tools	LTspice Model	LTspice Model
Export Control	no	no
Features	DDR Mode, Resistor Set Frequency, Power Good	DDR Mode, Resistor Set Frequency, Power Good
Frequency, kHz	1500	1500
Integrated Inductor	no	no
Ishutdown, µA	15	15
Isupply, mA	1	1
Monolithic	no	no
Number of Outputs	1	1
Operating Temperature Range, °C	0 to 85	0 to 85
Output Current, A	20	20
Polyphase	no	no
Switch Current, A	20	20
Synchronous	yes	yes
Topology	Buck	Buck
Vin Max, V	36	36
Vin Min, V	1.5	1.5
Vout Max, V	36	36
Vout Maximum	VREF/2	VREF/2
Vout Min, V	0.7	0.7

生态计划

	LTC3718EG#PBF	LTC3718EG#TRPBF
RoHS	Compliant	Compliant

设计须知

下载
Wide Input Range, High Efficiency DDR Termination Power Supply Achieves Fast Transient Response &mdash DN281
PDF, 84 Kb, 档案已发布: Apr 1, 2002
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advertisement Wide Input Range, High Efficiency DDR Termination Power
Supply Achieves Fast Transient Response вЂ“ Design Note 281
Wei Chen
Introduction
TodayвЂ™s complicated computing and communication
systems demand high system memory bandwidths. The
emerging standard is Double Data Rate (DDR) memory
because of its higher data rate and relatively low cost.
A typical DDR memory system needs at least two main
power supplies: VDD for the I/O power and V TT for the
termination power. To ensure good signal quality and
fast data rate, the termination power supply (V TT ) must
always track the VDD with V TT = VDD/2. V TT can be as
low as 0.6V. Since the termination resistors can carry
current in either direction, the V TT power supply must
be able to both source and sink current while tracking
the VDD supply. A family of new termination/tracking
controllers, including the LTC В®3717, LTC3718 and
LTC3831, satisfy these DDR requirements. on-time programmed by the input voltage and output
voltage. This scheme allows a fairly constant switching
frequency while achieving an extremely fast load transient response. In addition, the controllerвЂ™s minimum
on-time is less than 100ns, allowing for a very small
duty cycle at a very high switching frequency, thus …

文章

下载
High Efficiency DDR Termination Power Supplies Source and Sink More than 10 Amps &mdash LT Journal
PDF, 205 Kb, 档案已发布: Mar 1, 2002
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DESIGN FEATURES High Efficiency DDR Termination
Power Supplies Source and Sink
More than 10 Amps
by Wei Chen
Introduction
The emerging standard for system
memory in computing and communication systems is Double Data Rate
(DDR) memory. Typical DDR memory
needs at least two main power supplies: VDD and VTT, where VDD powers
the I/O, and VTT powers the I/O termination. To ensure good signal
quality and fast data rate, the termination power supply VTT must always
track the VDD supply with VTT = VDD/
2. Since the termination resistors can
carry current in either direction, the
VTT power supply must be able to
both source and sink current while
tracking the VDD supply. A typical
DDR termination power supply for a
PC application requires 2A to 10A of
current. In servers, high power workstations or broadband networking
equipment applications, the DDR termination supply current may well
exceed 10A. At these current levels, a
linear regulator is not a viable solu-VDD …

模型线

系列: LTC3718 (2)

LTC3718EG#PBF LTC3718EG#TRPBF

制造商分类

Power Management > Switching Regulator > DDR Memory/Bus Termination

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