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• 下载
  Active Voltage Positioning Reduces Output Capacitors &mdash Design Solutions 10
  PDF, 130 Kb, 档案已发布: Nov 1, 1999
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  Design Solutions 10
  November 1999
  Active Voltage Positioning Reduces Output Capacitors
  by Robert Sheehan
  INTRODUCTION
  Power supply performance, especially transient response,
  is key to meeting today’s demands for low voltage, high
  current microprocessor power. In an effort to minimize
  the voltage deviation during a load step, a technique that
  has recently been coined “active voltage positioning” is
  generating substantial interest and gaining popularity in
  the portable computer market. The benefits include lower
  peak-to-peak output voltage deviation for a given load
  step, without having to increase the output filter capacitance. Alternatively, the output filter capacitance can be
  reduced while maintaining the same peak-to-peak transient response.
  BASIC PRINCIPLE
  The term “active voltage positioning” (AVP) refers to
  setting the power supply output voltage at a point that is
  dependent on the load current. At minimum load, the
  output voltage is set to a slightly higher than nominal level.
  At full load, the output voltage is set to a slightly lower than
  nominal level. Effectively, the DC load regulation is
  degraded, but the load transient voltage deviation will be …

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  PolyPhase Surface Mount Power Supply Meets AMD Athlon Processor Requirements with No Heat Sink &mdash DN216
  PDF, 87 Kb, 档案已发布: Oct 3, 1999
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  advertisement PolyPhase Surface Mount Power Supply Meets AMD Athlon
  Processor Requirements with No Heat Sink – Design Note 216
  Craig Varga
  Introduction
  With the introduction of the AMD Athlon processor, the
  supply current requirement for a desktop PC’s processor
  has, for the п¬Ѓrst time, surpassed the 40A mark. This,
  combined with low operating voltage (1.6V nominal)
  and very tight transient-response requirements, pushes
  conventional power supply design approaches to their
  limits. The LTC В®1929 PolyPhaseВ® current mode controller makes a slight break with convention. Instead
  of trying to deliver 40A with a single regulator, the
  load is split in half by paralleling two regulators. The
  magic, however, is in the phase relationship of the two
  regulators’ clocks. PolyPhase Architecture
  The two synchronous buck regulators are connected in
  parallel and their clocks are synchronized 180В° out of
  phase. This seemingly simple trick results in tremendous
  performance advantages as well as cost savings. A
  current mode architecture was chosen to reduce possible problems related to circulating currents that can
  appear in paralleled voltage mode regulators. Competing
  L, LT, LTC, LTM, Linear Technology, the Linear logo and PolyPhase are registered
  trademarks of Linear Technology Corporation. All other trademarks are the property …

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制造商分类

• Power Management > Switching Regulator > Digitally Programmable Regulators

其他名称:

LTC1709EGTRPBF, LTC1709EG TRPBF