Datasheet Texas Instruments SN74ALS139 — 数据表
| 制造商 | Texas Instruments |
| 系列 | SN74ALS139 |
双2线至4线解码器/解复用器
数据表
Dual 2-Line To 4-Line Decoders/Demultiplexers datasheet
PDF, 761 Kb, 修订版: A, 档案已发布: Dec 1, 1994
从文件中提取
价格
状态
| SN74ALS139D | SN74ALS139DR | SN74ALS139DRG4 | SN74ALS139N | SN74ALS139N3 | SN74ALS139NE4 | SN74ALS139NSR | |
|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Obsolete (Manufacturer has discontinued the production of the device) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No | No | No | No |
打包
| SN74ALS139D | SN74ALS139DR | SN74ALS139DRG4 | SN74ALS139N | SN74ALS139N3 | SN74ALS139NE4 | SN74ALS139NSR | |
|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
| Pin | 16 | 16 | 16 | 16 | 16 | 16 | 16 |
| Package Type | D | D | D | N | N | N | NS |
| Industry STD Term | SOIC | SOIC | SOIC | PDIP | PDIP | PDIP | SOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDIP-T | R-PDIP-T | R-PDIP-T | R-PDSO-G |
| Package QTY | 40 | 2500 | 2500 | 25 | 25 | 2000 | |
| Carrier | TUBE | LARGE T&R | LARGE T&R | TUBE | TUBE | LARGE T&R | |
| Device Marking | ALS139 | ALS139 | ALS139 | SN74ALS139N | SN74ALS139N | ALS139 | |
| Width (mm) | 3.91 | 3.91 | 3.91 | 6.35 | 6.35 | 6.35 | 5.3 |
| Length (mm) | 9.9 | 9.9 | 9.9 | 19.3 | 19.3 | 19.3 | 10.3 |
| Thickness (mm) | 1.58 | 1.58 | 1.58 | 3.9 | 3.9 | 3.9 | 1.95 |
| Pitch (mm) | 1.27 | 1.27 | 1.27 | 2.54 | 2.54 | 2.54 | 1.27 |
| Max Height (mm) | 1.75 | 1.75 | 1.75 | 5.08 | 5.08 | 5.08 | 2 |
| Mechanical Data | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | SN74ALS139D | SN74ALS139DR | SN74ALS139DRG4 | SN74ALS139N | SN74ALS139N3 | SN74ALS139NE4 | SN74ALS139NSR |
|---|---|---|---|---|---|---|---|
| Approx. Price (US$) | 0.33 | 1ku | ||||||
| Bandwidth, MHz | 75 | 75 | 75 | 75 | 75 | 75 | |
| Bits | 4 | 4 | 4 | 4 | 4 | 4 | |
| Bits(#) | 4 | ||||||
| Number of Channels | 2 | 2 | 2 | 2 | 2 | 2 | |
| Channels(#) | 2 | ||||||
| Configuration | 2:4 | 2:4 | 2:4 | 2:4 | 2:4 | 2:4 | 2:4 |
| Digital input leakage(Max), uA | 5 | 5 | 5 | 5 | 5 | 5 | |
| ESD Charged Device Model, kV | 0.75 | 0.75 | 0.75 | 0.75 | 0.75 | 0.75 | |
| ESD HBM, kV | 2 | 2 | 2 | 2 | 2 | 2 | |
| F @ Nom Voltage(Max), Mhz | 75 | 75 | 75 | 75 | 75 | 75 | |
| F @ Nom Voltage(Max)(Mhz) | 75 | ||||||
| Function | Decoder/Demultiplexer | Decoder/Demultiplexer | Decoder/Demultiplexer | Decoder/Demultiplexer | Decoder/Demultiplexer | Decoder/Demultiplexer | Decoder/Demultiplexer |
| ICC @ Nom Voltage(Max), mA | 13 | 13 | 13 | 13 | 13 | 13 | |
| ICC @ Nom Voltage(Max)(mA) | 13 | ||||||
| Input Type | TTL | ||||||
| Operating Temperature Range, C | 0 to 70 | 0 to 70 | 0 to 70 | 0 to 70 | 0 to 70 | 0 to 70 | |
| Operating Temperature Range(C) | 0 to 70 | ||||||
| Output Drive (IOL/IOH)(Max), mA | 8/-0.4 | 8/-0.4 | 8/-0.4 | 8/-0.4 | 8/-0.4 | 8/-0.4 | |
| Output Drive (IOL/IOH)(Max)(mA) | 8/-0.4 | ||||||
| Output Type | TTL | ||||||
| Package Group | SOIC | SOIC | SOIC | PDIP | PDIP | PDIP | SO |
| Package Size: mm2:W x L, PKG | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | See datasheet (PDIP) | See datasheet (PDIP) | 16SO: 80 mm2: 7.8 x 10.2(SO) | |
| Package Size: mm2:W x L (PKG) | See datasheet (PDIP) | ||||||
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No | No | No | No | No |
| Technology Family | ALS | ALS | ALS | ALS | ALS | ALS | ALS |
| Type | Standard | Standard | Standard | Standard | Standard | Standard | Standard |
| VCC(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | |
| VCC(Max)(V) | 5.5 | ||||||
| VCC(Min), V | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | |
| VCC(Min)(V) | 4.5 | ||||||
| Voltage(Nom), V | 5 | 5 | 5 | 5 | 5 | 5 | |
| Voltage(Nom)(V) | 5 | ||||||
| tpd @ Nom Voltage(Max), ns | 14 | 14 | 14 | 14 | 14 | 14 | |
| tpd @ Nom Voltage(Max)(ns) | 14 |
生态计划
| SN74ALS139D | SN74ALS139DR | SN74ALS139DRG4 | SN74ALS139N | SN74ALS139N3 | SN74ALS139NE4 | SN74ALS139NSR | |
|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Not Compliant | Compliant | Compliant |
| Pb Free | No | Yes | Yes |
应用须知
- Advanced Schottky (ALS and AS) Logic FamiliesPDF, 1.9 Mb, 档案已发布: Aug 1, 1995
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t
模型线
系列: SN74ALS139 (7)
制造商分类
- Semiconductors> Switches and Multiplexers> Buffered Encoders and Decoders