Datasheet Texas Instruments AM5726BABCXEA — 数据表
制造商 | Texas Instruments |
系列 | AM5726 |
零件号 | AM5726BABCXEA |
Sitara处理器:双ARM Cortex-A15和DSP 760-FCBGA -40至105
数据表
AM572x Sitaraв„ў Processors Silicon Revision 2.0 datasheet
PDF, 4.6 Mb, 修订版: C, 档案已发布: Jun 6, 2017
从文件中提取
价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes |
打包
Pin | 760 | 760 |
Package Type | ABC | ABC |
Industry STD Term | FCBGA | FCBGA |
JEDEC Code | S-PBGA-N | S-PBGA-N |
Package QTY | 1 | 1 |
Carrier | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) |
Device Marking | SITARATM | AM5726BABCXEA |
Width (mm) | 23 | 23 |
Length (mm) | 23 | 23 |
Thickness (mm) | 2.39 | 2.39 |
Pitch (mm) | .8 | .8 |
Max Height (mm) | 2.96 | 2.96 |
Mechanical Data | 下载 | 下载 |
参数化
ARM CPU | 2 ARM Cortex-A15 |
ARM MHz | 1500 Max. |
ARM MIPS | 10500 Max. |
Application | Communications Equipment,Enterprise Systems,Industrial,Personal Electronics |
CAN | 2 |
Co-Processor | 2 ARM Cortex-M4,4 PRU-ICSS s |
DMA | 64-Ch EDMA Ch |
DRAM | DDR3,DDR3L |
DSP | 2 C66x |
DSP MHz | 750 Max. |
EMAC | 10/100/1000,2-Port 1Gb Switch,4-Port 10/100 PRU EMAC |
General Purpose Memory | 1 16-bit (GPMC, NAND flash,NOR Flash,SRAM) |
I2C | 5 |
IO Supply | 1.8,3.3 V |
Industrial Protocols | 1588,EtherCAT,EtherNet/IP,POWERLINK,PROFIBUS,PROFINET RT/IRT,SERCOS III |
MMC/SD | 4 |
McASP | 8 |
On-Chip L1 Cache | 32KB (L1D and L1I ARM Cortex-A15) |
On-Chip L2 Cache | 2MB (ARM Coxtex-A15) |
Operating Systems | Android,Integrity,Linux,Neutrino,Nucleus,TI-RTOS,VxWorks,Windows Embedded CE |
Operating Temperature Range | -40 to 105,0 to 90 C |
Other Hardware Acceleration | Crypto Accelerator |
Other On-Chip Memory | 2.5 MB w/ECC |
PCI/PCIe | 2 PCIe |
PWM | 3 Ch |
Package Group | FCBGA |
QSPI | 1 |
RTC | 1 |
Rating | Catalog |
SATA | 1 |
SPI | 4 |
Serial I/O | CAN,I2C,SPI,UART,USB |
UART | 10 SCI |
USB | 2 |
USB 2.0 | 1 |
USB 3.0 | 1 |
Video Port | 6+ Configurable |
eCAP | 3 |
eQEP | 3 |
生态计划
RoHS | Compliant |
设计套件和评估模块
- Development Kits: TMDXIDK57X-LCD
AM57x IDK LCD Kit
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: TMDSCM572X
TMDSEVM572x Camera Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: TMDSEVM572X
AM572x Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- AM572x Thermal ConsiderationsPDF, 400 Kb, 档案已发布: Dec 6, 2016
This application report discusses thermal performance of the Sitara AM572x series processors. Data presented demonstrates the effects of different thermal management strategies in terms of processor junction temperature and power consumption across CPU loading and ambient temperature. - AM572x Power Estimation ToolPDF, 28 Kb, 档案已发布: Jul 19, 2017
The power estimation spreadsheet provides power consumption estimates based on measured and simulated data; they are provided “as is” and are not guaranteed within a specified precision. Power consumption depends on electrical parameters, silicon process variations, environmental conditions, and uses cases running on the processor during operation. Actual power consumption should be verified in th - AM572x Power Consumption SummaryPDF, 84 Kb, 档案已发布: Mar 27, 2017
This application report discusses the power consumption for common system application usage scenarios for the AM572x Sitaraв„ў processors. The metrics contained in this document serve to provide users with a better understanding of AM572x active power behaviors: making it easier to determine a suitable configuration to meet a given power budget. - DSPLIB for Processor SDK RTOSPDF, 461 Kb, 档案已发布: Nov 4, 2016
- AM572x GP EVM Power SimulationsPDF, 22.4 Mb, 档案已发布: Oct 8, 2015
The purpose of this application report is to present the flow, the environment settings and TI requirements used to perform the analysis of critical power nets of a platform using an application processor. The Power Delivery Network (PDN) performance is measured by extracting and analyzing three printed circuit board (PCB) parameters: DC resistivity, capacitor loop inductance, and broadband target - AM57xx BGA PCB DesignPDF, 69 Kb, 档案已发布: Aug 25, 2017
This application report is designed to help customers understand what is involved with PCB design for AM57xx BGAs. - Code Composer Studio Device Support PackagePDF, 87 Kb, 档案已发布: Nov 19, 2015
This document gives a brief description of download location and installation procedures of the device Chip Support Package (CSP) for Code Composer Studioв„ў (CCS). - AM57x Processor SDK Linux: Customization of Multicore Application to Run on a NePDF, 55 Kb, 档案已发布: Oct 6, 2016
When customers develop applications that use multiple programmable cores on the AM57x they require a clear understanding of roles and configurations of multiple software (SW) components such as IPC, CMEM, CMA, Linuxв„ў, and SYS/BIOS on slave cores, in order to arrive at correct configuration for their application. This application report describes memory utilization schemes by A15/DSP/IPU, how they - AM572x/AM571x Compatibility Guide (Rev. C)PDF, 182 Kb, 修订版: C, 档案已发布: Feb 22, 2016
This application report provides a summary of the differences between AM572x Silicon Revision 1.1/2.0 and AM571x Silicon Revision 1.0 high-performance ARMВ® devices. - IODELAY Application Note for AM57xx Devices (Rev. A)PDF, 785 Kb, 修订版: A, 档案已发布: Aug 3, 2017
- Sitara Processor Power Distribution Networks: Implementation and AnalysisPDF, 6.7 Mb, 档案已发布: Apr 4, 2017
The purpose of a power distribution network (PDN) is primarily to provide clean and reliable power to the active devices on the system. The printed circuit board (PCB) is a critical component of the system-level PDN delivery network. As such, optimal design of the PCB power distribution network is of utmost importance for high performance microprocessors. This application report provides implement - AN-1281 Bumped Die (Flip Chip) Packages (Rev. A)PDF, 2.2 Mb, 修订版: A, 档案已发布: May 1, 2004
Application Note 1281 Bumped Die (Flip Chip) Packages - EMIF Tools (Rev. A)PDF, 207 Kb, 修订版: A, 档案已发布: Jun 5, 2017
At the center of every application is the need for memory. With limited on-chip processor memory, external memory serves as a solution for large software systems and data storage, and an unstable external memory interface can result in system failures or hinder software development. To prevent potential system level anomalies and ensure robust systems, hardware must be configured correctly and tes - PRU-ICSS Migration Guide: AM335x to AM57x (Rev. A)PDF, 71 Kb, 修订版: A, 档案已发布: Jul 13, 2017
This software migration guide assists in porting legacy software developed for the Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-CSS) on AM335x to AM57x platforms. - Processor SDK RTOS Audio Benchmark Starter KitPDF, 530 Kb, 档案已发布: Apr 12, 2017
The TI TMS320C6000в„ў Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications that are commonly used in audio processing application. This application notes describes Audio Benchmark Starterkit software that is intended to provide an easy and quick way to benchmark key audio functions on C66x and C674x DSP device - Processor-SDK RTOS Power Management and MeasurementPDF, 78 Kb, 档案已发布: Aug 2, 2017
Processor-SDK RTOS provides out-of-the-box power management examples that empower customers to tailor Sitara processors’ (ARM and DSP) power-performance points per use case. You can configure all supported operating points and run CPU Idle and Dhrystone benchmarking workloads while employing a minimal kernel with real-time assurance. This application report provides an overview of the Processor-SD - PRU-ICSS Feature ComparisonPDF, 29 Kb, 档案已发布: Jun 5, 2017
This application report documents the feature differences between the PRU subsystems available on different TI processors. - TI DSP BenchmarkingPDF, 62 Kb, 档案已发布: Jan 13, 2016
This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms. - Plastic Ball Grid Array [PBGA] Application Note (Rev. B)PDF, 1.6 Mb, 修订版: B, 档案已发布: Aug 13, 2015
- High-Speed Interface Layout Guidelines (Rev. G)PDF, 814 Kb, 修订版: G, 档案已发布: Jul 27, 2017
As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
模型线
系列: AM5726 (4)
- AM5726BABCX AM5726BABCXA AM5726BABCXAR AM5726BABCXEA
制造商分类
- Semiconductors > Processors > Sitara Processors > ARM Cortex-A15 > AM57x