Datasheet Texas Instruments THS5661AIDW — 数据表
| 制造商 | Texas Instruments |
| 系列 | THS5661A |
| 零件号 | THS5661AIDW |
12位125MSPS数模转换器（DAC）28-SOIC -40至85
数据表
12-Bit, 125 MSPS, CommsDAC Digital-to-Analog Converter datasheet
PDF, 960 Kb, 修订版: B, 档案已发布: Sep 25, 2002
从文件中提取
价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
打包
| Pin | 28 |
| Package Type | DW |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 20 |
| Carrier | TUBE |
| Device Marking | THS5661AI |
| Width (mm) | 7.5 |
| Length (mm) | 17.9 |
| Thickness (mm) | 2.35 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2.65 |
| Mechanical Data | 下载 |
参数化
| Architecture | Current Source |
| DAC Channels | 1 |
| Interface | Parallel CMOS |
| Interpolation | 1x |
| Operating Temperature Range | -40 to 85 C |
| Package Group | SOIC |
| Package Size: mm2:W x L | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) PKG |
| Power Consumption(Typ) | 175 mW |
| Rating | Catalog |
| Resolution | 12 Bits |
| SFDR | 59 dB |
| Sample / Update Rate | 125 MSPS |
生态计划
| RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: THS5661EVM
THS5661A 12-Bit, 125-MSPS Digital-to-Analog Converter Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: TSW2200EVM
TSW2200 Low-Cost Portable Power Supply Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Using TI FIFOs to Interface High-Speed Data Converters With TI TMS320 DSPsPDF, 249 Kb, 档案已发布: Jun 8, 2001
Most high-speed data converters cannot be connected directly to a digital signal processor (DSP). The required transfer rates would tie up most of the DSP's I/O bandwidth. A FIFO is an appropriate solution for this problem because it can buffer a large block of data, and the DSP can read data from the FIFO in a burst mode. This is much more efficient compared to single reads for every sampled valu - Wideband Complementary Current Output DAC Single-Ended InterfacePDF, 597 Kb, 档案已发布: Jun 21, 2005
High-speed digital-to-analog converters (DACs) most often use a transformer-coupled output stage. In applications where this configuration is not practical, a single op ampdifferential to single-ended stage has often been used. This application note steps through the exact design equations required to achieve gain matching from each output as well as a matched input impedance to each of the DA - Noise Analysis for High Speed Op Amps (Rev. A)PDF, 256 Kb, 修订版: A, 档案已发布: Jan 17, 2005
As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu
模型线
系列: THS5661A (3)
- THS5661AIDW THS5661AIPW THS5661AIPWR
制造商分类
- Semiconductors > Data Converters > Digital-to-Analog Converters (DACs) > High Speed DACs (>10MSPS)