Datasheet Texas Instruments ADC12D1600CCMLS — 数据表

数据表

PDF, 904 Kb, 档案已发布: Dec 17, 2012

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Signal Chain Noise Figure Analysis
PDF, 615 Kb, 档案已发布: Oct 29, 2014
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Wide Bandwidth Receiver Implementation by Interleaving Two Giga-Sampling ADCs
PDF, 621 Kb, 档案已发布: Dec 7, 2015
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Synchronizing the Giga-Sample ADCs Interfaced with Multiple FPGAs
PDF, 943 Kb, 档案已发布: Aug 6, 2014
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AN-2128 ADC1xD1x00 Pin Compatibility (Rev. C)
PDF, 60 Kb, 修订版: C, 档案已发布: May 1, 2013
In order to facilitate upgrading applications from a 10-bit Gig ADC to a 12-bit Gig ADC, the ADC10D1x00(ADC10D1500/ADC10D1000) is designed to be pin-compatible with the ADC12D1x00(ADC12D1800/1600/1000). This means that a single board layout may be designed with both resolutionADCs in mind for more cost efficient and time-to-market product development.
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From Sample Instant to Data Output: Understanding Latency in the GSPS ADC
PDF, 392 Kb, 档案已发布: Dec 18, 2012
For many applications which use ultra high-speed ADCs, latency can be a critical performance specification. For example, if the ADC is used in any kind of feedback loop, then the absolute latency is an important factor. For a MIMO system such as a phased array radar, the relative difference and variability in latency becomes important. This application note covers latency in the GSPS ADC products,
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AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G)
PDF, 169 Kb, 修订版: G, 档案已发布: Feb 3, 2017

系列: ADC12D1600QML-SP (2)

Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)