Datasheet Texas Instruments 5962-0720801VXC — 数据表

制造商Texas Instruments
系列ADS5463-SP
零件号5962-0720801VXC
Datasheet Texas Instruments 5962-0720801VXC

12位500MSPS模数转换器-V类84-CFP -55至125

数据表

ADS5463-SP Class V, 12-Bit, 500-MSPS Analog-to-Digital Converter datasheet
PDF, 896 Kb, 修订版: G, 档案已发布: Oct 31, 2017
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin84
Package TypeHFG
Industry STD TermCFP
JEDEC CodeS-CQFP-N
Package QTY1
Width (mm)19.05
Length (mm)19.05
Thickness (mm)3.68
Pitch (mm)0.64
Max Height (mm)3.68
Mechanical Data下载

参数化

# Input Channels1
Analog Voltage AVDD(Max)3.6 V
Analog Voltage AVDD(Min)3 V
ArchitecturePipeline
Digital Supply(Max)3.6 V
Digital Supply(Min)3 V
ENOB10.1 Bits
INL(Max)3.5 +/-LSB
INL(Typ)1.5 +/-LSB
InterfaceParallel LVDS
Operating Temperature Range-55 to 125,25 Only C
Package GroupCFP
Package Size: mm2:W x LSee datasheet (CFP) PKG
Power Consumption(Typ)2250 mW
RatingSpace
Reference ModeExt,Int
Resolution12 Bits
SFDR65 dB
SNR62.2 dB

生态计划

RoHSSee ti.com

设计套件和评估模块

  • Evaluation Modules & Boards: ADS5463EVM-CVAL
    ADS5463-SP Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADS5463EVM
    ADS5463 12-Bit; 500-MSPS Analog-to-Digital Converter Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, 档案已发布: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, 档案已发布: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, 修订版: A, 档案已发布: Sep 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, 档案已发布: Apr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.

模型线

系列: ADS5463-SP (3)

制造商分类

  • Semiconductors > Space & High Reliability > Data Converter > Analog to Digital Converters

其他名称:

59620720801VXC, 5962 0720801VXC