Datasheet Texas Instruments SM320C6678ACYPW — 数据表
| 制造商 | Texas Instruments |
| 系列 | SM320C6678-HIREL |
| 零件号 | SM320C6678ACYPW |

多核定点和浮点数字信号处理器841-FCBGA -55至115
数据表
SM320C6678-HIREL Multicore Fixed and Floating-Point Digital Signal Processor datasheet
PDF, 2.1 Mb, 修订版: A, 档案已发布: Apr 3, 2014
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应用须知
- SerDes Implementation Guidelines for KeyStone I DevicesPDF, 590 Kb, 档案已发布: Oct 31, 2012
The goal of KeyStone I SerDes collateral material is to make system implementation easier for the customer by providing the system solution. For these SerDes-based interfaces, it is not assumed that the system designer is familiar with the industry specifications, SerDes technology, or RF/microwave PCB design. However, it is still expected that the PCB design work will be supervised by a knowledge - Hardware Design Guide for KeyStone Devices (Rev. C)PDF, 1.7 Mb, 修订版: C, 档案已发布: Sep 15, 2013
- KeyStone I DDR3 Initialization (Rev. E)PDF, 114 Kb, 修订版: E, 档案已发布: Oct 28, 2016
The initialization of the DDR3 DRAM controller on KeyStone I DSPs is straightforward as long as the proper steps are followed. However, if some steps are omitted or if some sequence-sensitive steps are implemented in the wrong order, DDR3 operation will be unpredictable.All DDR3 initialization routines must contain the basic register writes to configure the memory controller within the DSP - TMS320C66x DSP Generation of Devices (Rev. A)PDF, 245 Kb, 修订版: A, 档案已发布: Apr 25, 2011
- PCIe Use Cases for KeyStone DevicesPDF, 320 Kb, 档案已发布: Dec 13, 2011
- Optimizing Loops on the C66x DSPPDF, 585 Kb, 档案已发布: Nov 9, 2010
- The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)PDF, 20 Kb, 修订版: A, 档案已发布: Nov 10, 2010
The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM - Clocking Design Guide for KeyStone DevicesPDF, 1.5 Mb, 档案已发布: Nov 9, 2010
- DDR3 Design Requirements for KeyStone Devices (Rev. B)PDF, 582 Kb, 修订版: B, 档案已发布: Jun 5, 2014
- Multicore Programming Guide (Rev. B)PDF, 1.8 Mb, 修订版: B, 档案已发布: Aug 29, 2012
As application complexity continues to grow, we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing demand, modern System-On-Chip solutions contain multiple processing cores. The dilemma is how to map applications to multicore devices. In this paper, we present a programming methodology for converting applications to run on multicore
模型线
系列: SM320C6678-HIREL (1)
- SM320C6678ACYPW
制造商分类
- Semiconductors > Space & High Reliability > Processor > Digital Signal Processor > C6000 DSPs