Datasheet NA555, NE555, SA555, SE555 (Texas Instruments) - 9

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NA555, NE555, SA555, SE555 www.ti.com
SLFS022I – SEPTEMBER 1973 – REVISED SEPTEMBER 2014
8 Detailed Description 8.1 Overview
The xx555 timer is a popular and easy to use for general purpose timing applications from 10 µs to hours or from < 1mHz to 100 kHz. In the time-delay or mono-stable mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the a-stable mode of operation, the frequency and duty cycle can be controlled independently with two external resistors and a single external capacitor. Maximum output sink and discharge sink current is greater for higher VCC and less for lower VCC.
8.2 Functional Block Diagram VCC RESET 8 CONT 4
Î
5
Î Î Î
R1
Î Î
6 THRES 3
Î
R
Î Î
1 OUT
Î Î Î
S
Î Î
2
Î
TRIG
Î
7 DISCH 1 GND
A. Pin numbers shown are for the D, JG, P, PS, and PW packages. B. RESET can override TRIG, which can override THRES.
8.3 Feature Description 8.3.1 Mono-stable Operation
For mono-stable operation, any of these timers can be connected as shown in Figure 9. If the output is low, application of a negative-going pulse to the trigger (TRIG) sets the flip-flop (Q goes low), drives the output high, and turns off Q1. Capacitor C then is charged through RA until the voltage across the capacitor reaches the threshold voltage of the threshold (THRES) input. If TRIG has returned to a high level, the output of the threshold comparator resets the flip-flop (Q goes high), drives the output low, and discharges C through Q1. Copyright © 1973–2014, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: NA555 NE555 SA555 SE555 Document Outline 1 Features 2 Applications 3 Description 4 Simplified Schematic Table of Contents 5 Revision History 6 Pin Configuration and Functions 7 Specifications 7.1 Absolute Maximum Ratings 7.2 Handling Ratings 7.3 Recommended Operating Conditions 7.4 Electrical Characteristics 7.5 Operating Characteristics 7.6 Typical Characteristics 8 Detailed Description 8.1 Overview 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Mono-stable Operation 8.3.2 A-stable Operation 8.3.3 Frequency Divider 8.4 Device Functional Modes 9 Applications and Implementation 9.1 Application Information 9.2 Typical Applications 9.2.1 Missing-Pulse Detector 9.2.1.1 Design Requirements 9.2.1.2 Detailed Design Procedure 9.2.1.3 Application Curves 9.2.2 Pulse-Width Modulation 9.2.2.1 Design Requirements 9.2.2.2 Detailed Design Procedure 9.2.2.3 Application Curves 9.2.3 Pulse-Position Modulation 9.2.3.1 Design Requirements 9.2.3.2 Detailed Design Procedure 9.2.3.3 Application Curves 9.2.4 Sequential Timer 9.2.4.1 Design Requirements 9.2.4.2 Detailed Design Procedure 9.2.4.3 Application Curves 10 Power Supply Recommendations 11 Device and Documentation Support 11.1 Related Links 11.2 Trademarks 11.3 Electrostatic Discharge Caution 11.4 Glossary 12 Mechanical, Packaging, and Orderable Information