Datasheet CD54HC14, CD74HC14, CD54HCT14, CD74HCT14 (Texas Instruments)

制造商Texas Instruments
描述High-Speed CMOS Logic Hex Inverting Schmitt Trigger
页数 / 页19 / 1 — CD54HC14, CD74HC14,. CD54HCT14, CD74HCT14. High-Speed CMOS Logic. Hex …
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CD54HC14, CD74HC14,. CD54HCT14, CD74HCT14. High-Speed CMOS Logic. Hex Inverting Schmitt Trigger. Features. Description

Datasheet CD54HC14, CD74HC14, CD54HCT14, CD74HCT14 Texas Instruments, 修订版: F

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CD54HC14, CD74HC14, CD54HCT14, CD74HCT14
Data sheet acquired from Harris Semiconductor SCHS129F
High-Speed CMOS Logic
January 1998 - Revised May 2005
Hex Inverting Schmitt Trigger Features Description • Unlimited Input Rise and Fall Times
The ’HC14 and ’HCT14 each contain six inverting Schmitt triggers in one package.
• Exceptionally High Noise Immunity
[ /Title (CD74H
• Fanout (Over Temperature Range) Ordering Information
C14,
- Standard Outputs . 10 LSTTL Loads TEMP. RANGE
CD74H
- Bus Driver Outputs . 15 LSTTL Loads PART NUMBER (oC) PACKAGE
CT14)
• Wide Operating Temperature Range . -55oC to 125oC
CD54HC14F3A -55 to 125 14 Ld CERDIP /Subject
• Balanced Propagation Delay and Transition Times
CD54HCT14F3A -55 to 125 14 Ld CERDIP (High
• Significant Power Reduction Compared to LSTTL
CD74HC14E -55 to 125 14 Ld PDIP Speed
Logic ICs
CD74HC14M -55 to 125 14 Ld SOIC CMOS
• HC Types
CD74HC14MT -55 to 125 14 Ld SOIC Logic
- 2V to 6V Operation
CD74HC14M96 -55 to 125 14 Ld SOIC Hex
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
Invert-
at V
CD74HC14PW -55 to 125 14 Ld TSSOP
CC = 5V • HCT Types
CD74HC14PWR -55 to 125 14 Ld TSSOP
- 4.5V to 5.5V Operation
CD74HCT14E -55 to 125 14 Ld PDIP
- CMOS Input Compatibility, Il

1
µ
A at VOL, VOH
CD74HCT14M -55 to 125 14 Ld SOIC CD74HCT14MT -55 to 125 14 Ld SOIC CD74HCT14M96 -55 to 125 14 Ld SOIC CD74HCT14PW -55 to 125 14 Ld TSSOP CD74HCT14PWR -55 to 125 14 Ld TSSOP NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250.
Pinout CD54HC14, CD54HCT14 (CERDIP) CD74HC14, CD74HCT14 (PDIP, SOIC, TSSOP)
TOP VIEW
1A 1 14 VCC 1Y 2 13 6A 2A 3 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3Y 6 9 4A GND 7 8 4Y
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2005, Texas Instruments Incorporated 1