Datasheet CH32X033, CH32X035 (Nanjing Qinheng Microelectronics) - 4

CH32X035 Datasheet https://wch-ic.com
1.2 Memory Map
Figure 1-2 Memory address map
Reserved
0x5005 0000
USBPD
0x4002 7000
PIOC
0x4002 6C00
Reserved
0x4002 6800
AWU
0x4002 6400
OPA
0x4002 6000
Reserved
0x4002 3800
USBFS
0x4002 3400
Reserved
0x4002 2400
Flash Interface
0x4002 2000
Reserved
0x4002 1400
RCC
0x4002 1000
Reserved
0x4002 0400
DMA
0x4002 0000
Reserved
0x4001 3C00
USART1
0x4001 3800
Reserved
0x4001 3400
SPI
0x4001 3000
TIM1
0x4001 2C00 0xFFFF FFFFF
Reserved
0x4001 2800
ADC/TouchKey Reserved
0x4001 2400 0xE010 0000
Reserved Core Private
0xE000 0000
Peripherals
0x4001 1400
Port C
0x4001 1000
Reserved Port B
0x4001 0C00
Port A
0x1FFF FFFF 0x4001 0800
EXTI Reserved
0xA000 1000 0x4001 0400 0x1FFF F900
AFIO Reserved Option Bytes
0x4001 0000 0x1FFF F800
Reserved Vendor Bytes
0xA000 0000 0x1FFF F700 0x4000 7400
Reserved PWR
0x1FFF 0D00 0x4000 7000
Reserved Reserved System FLASH
0x4000 5800
(BOOT_3KB+256B)
0x7000 0000
I2C
0x4000 5400 0x1FFF 0000
Reserved
0x4000 5000 0x6000 0000
Reserved USART4
0x4000 4C00
USART3 Reserved
0x4000 4800
USART2
0x4000 4400
Peripherals
0x0800 F800
Reserved
0x4000 0000 0x4000 3400
Reserved IWDG Code FLASH
0x4000 3000
WWDG 62KB
0x2000 5000 0x4000 2C00
20KB SRAM
0x2000 0000 0x0800 0000
Reserved Aliased to Flash or system memory FLASH depending on BOOT
0x4000 0800
pins TIM3
0x4000 0400 0x0000 0000 0x0000 0000
TIM2
0x4000 0000 4G linear address space V2.3 2 Document Outline Overview Features Chapter 1 Specification Information 1.1 System Structure 1.2 Memory Map 1.3 Clock Tree 1.4 Functional Description 1.4.1 RISC-V4C Processor 1.4.2 Programmable Protocol I/O Controller (PIOC) 1.4.3 On-chip Memory 1.4.4 Power Supply Scheme 1.4.5 Power Supply Monitor 1.4.6 System Voltage Regulator LDO 1.4.7 Low-power Mode 1.4.8 Programmable Fast Interrupt Controller (PFIC) 1.4.9 External Interrupt/Event Controller (EXTI) 1.4.10 General DMA Controller 1.4.11 Clock and Boot 1.4.12 Analog-to-digital Converter (ADC) and Touchkey Capacitance Detection (TKey) 1.4.13 Timer and Watchdog 1.4.14 Universal Synchronous/Asynchronous Receiver Transmitter (USART) 1.4.15 Serial Peripheral Interface (SPI) 1.4.16 I2C Bus 1.4.17 Universal Serial Bus USB2.0 Full-speed Host/Device Controller (USBFS) 1.4.18 USB PD and Type-C Controller (USB PD) 1.4.19 General-purpose Input and Output (GPIO) 1.4.20 Operational Amplifier/Comparator (OPA) 1.4.21 Voltage Comparator (CMP) 1.4.22 2-wire SDI Serial Debug Interface Chapter 2 Pinouts and Pin Definition 2.1 Pinouts 2.2 Pin Description 2.3 Pin Alternate Functions Chapter 3 Electrical Characteristics 3.1 Test Conditions 3.2 Absolute Maximum Ratings 3.3 Electrical Characteristics 3.3.1 Operating Conditions 3.3.2 Built-in Reset and Power Control Module Characteristics 3.3.3 Built-in Reference Voltage 3.3.4 Supply Current Characteristics 3.3.5 Internal Clock Source Characteristics 3.3.6 Wakeup Time from Low-power Mode 3.3.7 Memory Characteristics 3.3.8 I/O Port Characteristics 3.3.9 RST Pin Characteristics 3.3.10 USB PD Interface Characteristics 3.3.11 TIM Timer Characteristics 3.3.12 I2C Interface Characteristics 3.3.13 SPI Interface Characteristics 3.3.14 USART Characteristics 3.3.15 USB Interface Characteristics 3.3.16 12-bit ADC Characteristics 3.3.17 OPA Characteristics 3.3.18 CMP Characteristics Chapter 4 Package and Ordering Information Packages 4.1 LQFP64M Package 4.2 LQFP48 Package 4.3 QFN28 Package 4.4 QSOP28 Package 4.5 QFN20 Package 4.6 TSSOP20 Package 4.7 QFN12 Package Series Product Naming Rules