Datasheet 74AVC2T45FK (Toshiba) - 9

74AVC2T45FK 11.5. AC Characteristics (Note) (VCCA = 0.9 ± 0.045 V, Ta = -40 to 85 �) VCCB VCCB VCCB VCCB VCCB VCCB VCCB 0.9 ± 1.0 1.2 1.5 1.8 2.5 3.3 Characteristics Symbol Unit 0.045 V ± 0.05 V ± 0.1 V ± 0.1 V ± 0.15 V ± 0.2 V ± 0.3 V Max Max Max Max Max Max Max Propagation delay time (A → B) tPLH/tPHL 17.7 15.8 15.2 13.8 13.2 13.5 16.7 ns Propagation delay time (B → A) 17.7 15.2 13.1 11.7 10.7 10.1 10.4 3-state output disable time (DIR → A) tPLZ/tPHZ 24.7 24.7 24.7 24.7 24.7 24.8 25.8 3-state output disable time (DIR → B) 28.1 24.8 18.6 16.1 15.4 13.9 14.6 3-state output enable time (DIR → A) tPZL/tPZH 45.8 40.0 31.7 27.8 26.1 24.0 25.0 3-state output enable time (DIR → B) (Note 1) 42.4 40.5 39.9 38.5 37.9 38.3 42.5 Note: See Figure 12.1, 13.1, 13.2, table 12.1.1, 12.1.2, 13.1.1 for the measurement circuit. Note 1: Output enable time is obtained from the following formula. Output enable time (DIR → A) = Output disable time (DIR → B) + Propagation delay time (B → A) Output enable time (DIR → B) = Output disable time (DIR → A) + Propagation delay time (A → B) 11.6. AC Characteristics (Note) (VCCA = 1.0 ± 0.05 V, Ta = -40 to 85 �) VCCB VCCB VCCB VCCB VCCB VCCB VCCB 0.9 ± 1.0 1.2 1.5 1.8 2.5 3.3 Characteristics Symbol Unit 0.045 V ± 0.05 V ± 0.1 V ± 0.1 V ± 0.15 V ± 0.2 V ± 0.3 V Max Max Max Max Max Max Max Propagation delay time (A → B) tPLH/tPHL 15.2 13.6 12.8 11.6 11.4 10.9 11.1 ns Propagation delay time (B → A) 15.8 13.6 11.2 10.1 9.1 8.6 8.7 3-state output disable time (DIR → A) tPLZ/tPHZ 19.6 19.6 19.6 19.6 19.6 19.6 19.6 3-state output disable time (DIR → B) 25.8 22.6 16.2 14.0 13.3 12.0 12.3 3-state output enable time (DIR → A) tPZL/tPZH 41.6 36.2 27.4 24.1 22.4 20.6 21.0 3-state output enable time (DIR → B) (Note 1) 34.8 33.2 32.4 31.2 31.0 30.5 30.7 Note: See Figure 12.1, 13.1, 13.2, table 12.1.1, 12.1.2, 13.1.1 for the measurement circuit. Note 1: Output enable time is obtained from the following formula. Output enable time (DIR → A) = Output disable time (DIR → B) + Propagation delay time (B → A) Output enable time (DIR → B) = Output disable time (DIR → A) + Propagation delay time (A → B) 11.7. AC Characteristics (Note) (VCCA = 1.2 ± 0.1 V, Ta = -40 to 85 �) VCCB VCCB VCCB VCCB VCCB VCCB VCCB 0.9 ± 1.0 1.2 1.5 1.8 2.5 3.3 Characteristics Symbol Unit 0.045 V ± 0.05 V ± 0.1 V ± 0.1 V ± 0.15 V ± 0.2 V ± 0.3 V Max Max Max Max Max Max Max Propagation delay time (A → B) tPLH/tPHL 13.1 11.2 10.7 9.3 8.7 8.7 8.6 ns Propagation delay time (B → A) 15.2 12.8 10.7 9.1 8.5 7.8 7.6 3-state output disable time (DIR → A) tPLZ/tPHZ 12.2 12.2 12.2 12.2 12.2 12.2 12.2 3-state output disable time (DIR → B) 24.3 20.2 14.9 12.0 11.4 9.7 9.8 3-state output enable time (DIR → A) tPZL/tPZH 39.5 33.0 25.6 21.1 19.9 17.5 17.4 3-state output enable time (DIR → B) (Note 1) 25.3 23.4 22.9 21.5 20.9 20.9 20.8 Note: See Figure 12.1, 13.1, 13.2, table 12.1.1, 12.1.2, 13.1.1 for the measurement circuit. Note 1: Output enable time is obtained from the following formula. Output enable time (DIR → A) = Output disable time (DIR → B) + Propagation delay time (B → A) Output enable time (DIR → B) = Output disable time (DIR → A) + Propagation delay time (A → B) ©2026 9 Toshiba Electronic Devices & Storage Corporation 2026-04-21 Rev.2.0.A