Datasheet 74AVCH1T45NX (Toshiba) - 10

74AVCH1T45NX 11.3. AC Characteristics (Note) (VCCA = 0.7 V, Ta = 25 �) VCCB VCCB VCCB VCCB VCCB VCCB VCCB VCCB Characteristics Symbol 0.7 V 0.8 V 0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V Unit Typ. Typ. Typ. Typ. Typ. Typ. Typ. Typ. Propagation delay time (A → B) tPLH/tPHL 15.5 13.9 12.9 12.1 11.3 10.9 10.9 11.5 ns Propagation delay time (B → A) 15.5 12.7 11.2 9.2 8.5 8.0 7.5 7.2 3-state output disable time (DIR → A) tPLZ/tPHZ 22.8 22.8 22.8 22.8 22.7 22.7 22.6 22.5 3-state output disable time (DIR → B) 26.1 22.5 20.9 14.1 12.5 12.4 11.9 12.9 3-state output enable time (DIR → A) tPZL/tPZH 41.6 35.2 32.1 23.3 21.0 20.5 19.4 20.0 3-state output enable time (DIR → B) (Note 1) 38.3 36.7 35.7 34.9 34.0 33.6 33.5 34.0 Note: See Figure 12.1, 13.1, 13.2, table 12.1.1, 12.1.2, 13.1.1 for the measurement circuit. Note1: Output enable time is obtained from the following formula. Output enable time (DIR → A) = Output disable time (DIR → B) + Propagation delay time (B → A) Output enable time (DIR → B) = Output disable time (DIR → A) + Propagation delay time (A → B) 11.4. AC Characteristics (Note) (VCCB = 0.7 V, Ta = 25 �) VCCA VCCA VCCA VCCA VCCA VCCA VCCA VCCA Characteristics Symbol 0.7 V 0.8 V 0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V Unit Typ. Typ. Typ. Typ. Typ. Typ. Typ. Typ. Propagation delay time (A → B) tPLH/tPHL 15.5 12.7 11.2 9.2 8.5 8.0 7.5 7.2 ns Propagation delay time (B → A) 15.5 13.9 12.9 12.1 11.3 10.9 10.9 11.5 3-state output disable time (DIR → A) tPLZ/tPHZ 23.0 17.1 16.0 7.3 5.5 5.2 3.9 3.7 3-state output disable time (DIR → B) 26.1 22.9 21.5 19.4 18.4 18.3 18.5 20.6 3-state output enable time (DIR → A) tPZL/tPZH 41.6 36.7 34.4 31.5 29.8 29.2 29.4 32.0 3-state output enable time (DIR → B) (Note 1) 38.6 29.8 27.2 16.5 13.9 13.3 11.4 10.9 Note: See Figure 12.1, 13.1, 13.2, table 12.1.1, 12.1.2, 13.1.1 for the measurement circuit. Note 1: Output enable time is obtained from the following formula. Output enable time (DIR → A) = Output disable time (DIR → B) + Propagation delay time (B → A) Output enable time (DIR → B) = Output disable time (DIR → A) + Propagation delay time (A → B) 11.5. AC Characteristics (Note) (VCCA = 0.7 V, Ta = -40 to 85 �) VCCB VCCB VCCB VCCB VCCB VCCB VCCB VCCB 0.7 V 0.8 ± 0.9 ± 1.2 ± 1.5 ± 1.8 ± 2.5 ± 3.3 ± Characteristics Symbol Unit 0.04 V 0.045 V 0.1 V 0.1 V 0.15 V 0.2 V 0.3 V Max Max Max Max Max Max Max Max Propagation delay time (A → B) tPLH/tPHL 48.3 40.2 34.8 30.5 29.6 30.0 33.7 40.6 ns Propagation delay time (B → A) 48.3 39.5 33.4 28.0 25.9 25.1 24.3 23.6 3-state output disable time (DIR → B) tPLZ/tPHZ 54.5 54.5 54.5 54.5 54.5 54.5 54.7 54.9 3-state output disable time (DIR → A) 63.7 54.5 46.3 35.8 31.9 33.0 38.6 61.5 3-state output enable time (DIR → B) tPZL/tPZH 112.0 94.0 79.7 63.8 57.8 58.1 62.9 85.1 3-state output enable time (DIR → A) (Note 1) 102.8 94.7 89.3 85.0 84.1 84.5 88.4 95.5 Note: See Figure 12.1, 13.1, 13.2, table 12.1.1, 12.1.2, 13.1.1 for the measurement circuit. Note 1: Output enable time is obtained from the following formula. Output enable time (DIR → A) = Output disable time (DIR → B) + Propagation delay time (B → A) Output enable time (DIR → B) = Output disable time (DIR → A) + Propagation delay time (A → B) ©2026 10 Toshiba Electronic Devices & Storage Corporation 2026-04-21 Rev.1.0.A