Datasheet UCC33420 (Texas Instruments) - 7

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UCC33420 www.ti.com
SLUSFK1E – JANUARY 2024 – REVISED FEBRUARY 2025
6.6 Insulation Specifications (continued) PARAMETER TEST CONDITIONS VALUE UNIT
Method a: After I/O safety test subgroup 2/3, Vini ≤ 5 pC = VIOTM, tini = 60s; Vpd(m) = 1.2 × VIORM, tm = 10s Method a: After environmental tests subgroup 1, V ≤ 5 pC q ini = VIOTM, tini = 60s; Vpd(m) = 1.3 × VIORM, tm = pd Apparent charge (5) 10s Method b1: At routine test (100% production), Vini = 1.2 x VIOTM, tini = 1s; Vpd(m) = 1.5 × VIORM, tm = ≤ 5 pC 1s CIO Barrier capacitance, input to output (6) VIO = 0.4 sin (2πft), f = 1MHz < 3 pF VIO = 500V, TA = 25°C > 1012 Ω RIO Isolation resistance, input to output (6) VIO = 500V, 100°C ≤ TA ≤ 125°C > 1011 Ω VIO = 500V at TS = 150°C > 109 Ω Pollution degree 2 Climatic category 40/125/21
UL 1577
Withstand isolation voltage VISO Withstand isolation voltage VTEST = VISO , t = 60s (qualification) 3000 VRMS VTEST = 1.2 × VISO , t=1s (100% production) (1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed-circuit board are used to help increase these specifications. (2) This coupler is suitable for basic electrical insulation only within the maximum operating ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits. (3) Testing is carried out in air to determine the surge immunity of the package. (4) Testing is carried out in oil to determine the intrinsic surge immunity of the isolation barrier (5) Apparent charge is electrical discharge caused by a partial discharge (pd). (6) All pins on each side of the barrier tied together creating a two-terminal device Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: UCC33420 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Device Comparison 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Power Ratings 6.6 Insulation Specifications 6.7 Safety-Related Certifications 6.8 Safety Limiting Values 6.9 Electrical Characteristics 6.10 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Enable and Disable 7.3.2 Output Voltage Soft-Start 7.3.3 Output Voltage Steady-State Regulation 7.3.4 Protection Features 7.3.4.1 Input Under-Voltage and Over-Voltage Lockout 7.3.4.2 Output Under-Voltage Protection 7.3.4.3 Output Over-Voltage Protection 7.3.4.4 Over-Temperature Protection 7.3.4.5 Fault Reporting and Auto-Restart 7.3.5 VCC Load Recommended Operating Area 7.3.6 Electromagnetic Compatibility (EMC) Considerations 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.2 Typical Application 8.2.1 Design Requirements 8.2.2 Detailed Design Procedure 8.3 Power Supply Recommendations 8.4 Layout 8.4.1 Layout Guidelines 8.4.2 Layout Example 9 Device and Documentation Support 9.1 Device Support 9.1.1 Third-Party Products Disclaimer 9.2 Documentation Support 9.2.1 Related Documentation 9.3 Receiving Notification of Documentation Updates 9.4 Support Resources 9.5 Trademarks 9.6 Electrostatic Discharge Caution 9.7 Glossary 10 Revision History 11 Mechanical and Packaging Information