Datasheet MAX6951 (Analog Devices) - 5

制造商Analog Devices
描述Serially Interfaced, +2.7V to +5.5V, 5- and 8-Digit LED Display Drivers
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Serially Interfaced, +2.7V to +5.5V,. 5- and 8-Digit LED Display Drivers. MAX6950/MAX6951. Pin Description. PIN. NAME. FUNCTION

Serially Interfaced, +2.7V to +5.5V, 5- and 8-Digit LED Display Drivers MAX6950/MAX6951 Pin Description PIN NAME FUNCTION

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Serially Interfaced, +2.7V to +5.5V, 5- and 8-Digit LED Display Drivers MAX6950/MAX6951 Pin Description PIN NAME FUNCTION
1 DIN Serial Data Input. Data is loaded into the internal 16–bit Shift register on CLK’s rising edge. Serial-Clock Input. On CLK’s rising edge, data is shifted into the Internal Shift register. On CLK’s 2 CLK falling edge, data is clocked out of DOUT. CLK input is active only while CS is low. Digit X outputs sink current from the display common cathode when acting as digit drivers. 3–6, 10–14 DIGX, SEGX Segment X drivers source current to the display. Segment/digit drivers are high impedance when turned off. Current Setting. Connect to GND through a resistor (R 7 I SET) to set the peak current. This resistor, SET together with capacitor CSET, also sets the multiplex clock frequency. 8 GND Ground Multiplexer Clock Input. A capacitor (CSET) is connected to GND when the internal RC oscillator multiplex clock is used. Resistor RSET (also used to set the peak current) and capacitor CSET 9 OSC together set the multiplex clock frequency. When the external clock is used, OSC should be driven by a 1MHz to 8MHz clock. 15 CS Chip-Select Input. Serial data is loaded into the Shift register while CS is low. The last 16 bits of serial data are latched on CS’s rising edge. 16 V+ Positive Supply Voltage. Bypass to GND with a 0.1µF capacitor. PAD E xposed p ad Exposed pad on package underside. Connect to GND.
Detailed Description
segments are wired with the common cathodes to fol- low Table 1. The MAX6950/MAX6951 can drive multi-
Differences Between
digit LED displays that have the segments individually
MAX6950 and MAX6951
pinned for each digit because then the digits can be The MAX6950 is a five-digit common-cathode display connected together correctly externally, just as if indi- driver. It drives five digits, with each digit comprising vidual digits were used. eight LEDs with cathodes connected to a common cathode. The display limit is therefore 40 LEDs or digit
Serial-Addressing Modes
segments. The microprocessor interface on the MAX6950/ MAX6951 is a SPI-compatible 3-wire serial interface The MAX6951 is an eight-digit common-cathode dis- using three input pins (Figure 1). This interface is used play driver. It drives eight digits, with each digit com- to write configuration and display data to the MAX6950/ prising eight LEDs. The only difference between the MAX6951. The serial interface data word length is 16 MAX6950 and MAX6951 is that the MAX6950 is missing bits, which are labeled D15–D0 (Table 2). D15–D8 con- three digit drivers. The MAX6950 can be configured to tain the command address, and D7–D0 contain the scan eight digits, but if the last three digits are wired data. The first bit received is D15, the most-significant up, they do not light. bit (MSB). The three input pins are: The MAX6950/MAX6951 use a unique multiplexing • CLK is the serial clock input, and may idle low or scheme to minimize the connections between the driver high at the start and end of a write sequence. and LED display. The scheme requires that the seg- ment connections are different to each of the five • CS is the MAX6950/MAX6951s’ chip-select input, (MAX6950) or eight (MAX6951) digits (Table 1). This is and must be low to clock data into the MAX6950/ shown in the Typical Application Circuit, which uses MAX6951. single-digit type displays. The MAX6950/MAX6951 are • DIN is the serial data input, and must be stable not intended to drive multidigit display types, which when it is sampled on the rising edge of the clock. have the segments internally wired together, unless the
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