Datasheet TB9084FTG (Toshiba) - 3
| 制造商 | Toshiba |
| 描述 | Pre-driver for automobile |
| 页数 / 页 | 78 / 3 — 4. Block Diagram. Fig. 4.1 Block Diagram |
| 修订版 | 3.0 |
| 文件格式/大小 | PDF / 3.7 Mb |
| 文件语言 | 英语 |
4. Block Diagram. Fig. 4.1 Block Diagram
该数据表的模型线
文件文字版本
TB9084FTG
4. Block Diagram Fig. 4.1 Block Diagram
© 2 025 3 2025-07-31 Toshiba Electronic Devices & Storage Corporation Rev. 3.0 Document Outline 1. Description 2. Applications 3. Features 4. Block Diagram 5. Pin Assignments Top view 6. Pin Description 7. Functional Description 7.1. Charge Pump Circuit 7.2. Gate Driver Circuits 7.2.1. Gate Drivers for Driving 3-Phase FETs 7.2.2. Gate Driver for FET for Reverse Polarity Protection 7.3. Current Sensing Circuit 7.3.1. Configuration 7.3.2. Offset Calibration 7.4. Oscillation Circuit 7.5. Abnormality Flag Output Function 7.5.1. NDIAG Terminal Output 7.5.2. Status Registers in SPI communication 7.6. Abnormality Detection Circuits 7.6.1. VCC Under Voltage Detection Function 7.6.2. VB Under Voltage Detection Function 7.6.3. RPPO Under Voltage Detection Function 7.6.4. VCC Over Voltage Detection Function 7.6.5. VCP Over Voltage Detection Function 7.6.6. Over temperature Detection Function 7.6.7. VDS Detection Function for 3-Phase FETs 7.6.8. Abnormality Detection for CP1SW and CP2SW Terminals 7.7. Alarm Input Circuit 7.8. SPI Communication Circuit 7.8.1. SPI Communication Operation 7.8.2. Error Judgment 7.8.3. Register Map 7.8.3.1. CONFIG1 Write Address=2h / Read Address=3h 7.8.3.2. CONFIG2 Write Address=4h / Read Address=5h 7.8.3.3. CONFIG3 Write Address=6h / Read Address=7h 7.8.3.4. CONFIG4 (Write Address=8h / Read Address=9h 7.8.3.5. CONFIG5 Write Address=Ah / Read Address=Bh 7.8.3.6. STAT1 / Read Address=Dh 7.8.3.7. STAT2 / Read Address=Fh 7.8.3.8. STAT1_CLR Write Address=10h 7.8.3.9. STAT2_CLR Write Address=12h 7.8.3.10. NOP Write Address=Fh / Read Address=Fh 8. Absolute Maximum Ratings (Ta = 25 C) 9. Electrical Characteristics 9.1. Operating Voltage Ranges 9.2. Consumption Current 9.3. Charge Pump Circuit 9.4. Gate Driver Circuits 9.5. Current Sense Amplifier Circuit 9.6. Oscillation Circuit 9.7. Abnormality Detection Circuits 9.8. Alarm Input Circuit 9.9. SPI Communication Circuit 10. Application Circuit Example 11. Package Outlines 12. Revision History 13. Abbreviation Collection RESTRICTIONS ON PRODUCT USE
4. Block Diagram Fig. 4.1 Block Diagram
© 2 025 3 2025-07-31 Toshiba Electronic Devices & Storage Corporation Rev. 3.0 Document Outline 1. Description 2. Applications 3. Features 4. Block Diagram 5. Pin Assignments Top view 6. Pin Description 7. Functional Description 7.1. Charge Pump Circuit 7.2. Gate Driver Circuits 7.2.1. Gate Drivers for Driving 3-Phase FETs 7.2.2. Gate Driver for FET for Reverse Polarity Protection 7.3. Current Sensing Circuit 7.3.1. Configuration 7.3.2. Offset Calibration 7.4. Oscillation Circuit 7.5. Abnormality Flag Output Function 7.5.1. NDIAG Terminal Output 7.5.2. Status Registers in SPI communication 7.6. Abnormality Detection Circuits 7.6.1. VCC Under Voltage Detection Function 7.6.2. VB Under Voltage Detection Function 7.6.3. RPPO Under Voltage Detection Function 7.6.4. VCC Over Voltage Detection Function 7.6.5. VCP Over Voltage Detection Function 7.6.6. Over temperature Detection Function 7.6.7. VDS Detection Function for 3-Phase FETs 7.6.8. Abnormality Detection for CP1SW and CP2SW Terminals 7.7. Alarm Input Circuit 7.8. SPI Communication Circuit 7.8.1. SPI Communication Operation 7.8.2. Error Judgment 7.8.3. Register Map 7.8.3.1. CONFIG1 Write Address=2h / Read Address=3h 7.8.3.2. CONFIG2 Write Address=4h / Read Address=5h 7.8.3.3. CONFIG3 Write Address=6h / Read Address=7h 7.8.3.4. CONFIG4 (Write Address=8h / Read Address=9h 7.8.3.5. CONFIG5 Write Address=Ah / Read Address=Bh 7.8.3.6. STAT1 / Read Address=Dh 7.8.3.7. STAT2 / Read Address=Fh 7.8.3.8. STAT1_CLR Write Address=10h 7.8.3.9. STAT2_CLR Write Address=12h 7.8.3.10. NOP Write Address=Fh / Read Address=Fh 8. Absolute Maximum Ratings (Ta = 25 C) 9. Electrical Characteristics 9.1. Operating Voltage Ranges 9.2. Consumption Current 9.3. Charge Pump Circuit 9.4. Gate Driver Circuits 9.5. Current Sense Amplifier Circuit 9.6. Oscillation Circuit 9.7. Abnormality Detection Circuits 9.8. Alarm Input Circuit 9.9. SPI Communication Circuit 10. Application Circuit Example 11. Package Outlines 12. Revision History 13. Abbreviation Collection RESTRICTIONS ON PRODUCT USE