Datasheet SN74LVC1G16 (Texas Instruments)
| 制造商 | Texas Instruments |
| 描述 | One-channel 1.65V-to-5.5V inverter with open-drain outputs and Schmitt-trigger inputs |
| 页数 / 页 | 30 / 1 — SN74LVC1G16. SN74LVC1G16 Inverting Buffer with Schmitt-Trigger Input and … |
| 文件格式/大小 | PDF / 1.2 Mb |
| 文件语言 | 英语 |
SN74LVC1G16. SN74LVC1G16 Inverting Buffer with Schmitt-Trigger Input and Open-Drain Output. 1 Features. 3 Description
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SN74LVC1G16
SCLSA29B – OCTOBER 2024 – REVISED MAY 2025
SN74LVC1G16 Inverting Buffer with Schmitt-Trigger Input and Open-Drain Output 1 Features 3 Description
• Operating range from 1.65V to 5.5V The SN74LVC1G16 device is an Inverter Buffer with a • 5.5V tolerant input pins Schmitt-Trigger input and an Open-Drain output. • Supports standard pinouts
Package Information
• Latch-up performance exceeds 100mA
PART NUMBER PACKAGE
(1)
PACKAGE SIZE
(2)
BODY SIZE
(3) per JESD 17 DBV (SOT-23, 5) 2.9mm × 2.8mm 2.9mm × 1.6mm SN74LVC1G16
2 Applications
DCK (SOT-SC70, 5) 2mm × 2.1mm 2mm × 1.25mm • Combining power good signals (1) For more information, see Section 11. • Enable digital signals (2) The package size (length × width) is a nominal value and includes pins, where applicable. (3) The body size (length × width) is a nominal value and does not include pins. A Y
Logic Diagram
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Pin Configuration and Functions 5 Specifications 5.1 Absolute Maximum Ratings 5.2 ESD Ratings 5.3 Recommended Operating Conditions 5.4 Thermal Information 5.5 Electrical Characteristics 5.6 Switching Characteristics 5.7 Typical Characteristics 6 Parameter Measurement Information 7 Overview 8 Functional Block Diagram 9 Detailed Description 9.1 Feature Description 9.1.1 Open-Drain CMOS Outputs 9.1.2 CMOS Schmitt-Trigger Inputs 9.1.3 Clamp Diode Structure 10 Application and Implementation 10.1 Application Information 10.2 Typical Application 10.2.1 Design Requirements 10.2.1.1 Power Considerations 10.2.1.2 Input Considerations 10.2.1.3 Output Considerations 10.2.2 Detailed Design Procedure 10.3 Application Curves 10.4 Power Supply Recommendations 10.5 Layout 10.5.1 Layout Guidelines 10.5.2 Layout Example 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation 11.2 Receiving Notification of Documentation Updates 11.3 Support Resources 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Revision History 13 Mechanical, Packaging, and Orderable Information
SN74LVC1G16
SCLSA29B – OCTOBER 2024 – REVISED MAY 2025
SN74LVC1G16 Inverting Buffer with Schmitt-Trigger Input and Open-Drain Output 1 Features 3 Description
• Operating range from 1.65V to 5.5V The SN74LVC1G16 device is an Inverter Buffer with a • 5.5V tolerant input pins Schmitt-Trigger input and an Open-Drain output. • Supports standard pinouts
Package Information
• Latch-up performance exceeds 100mA
PART NUMBER PACKAGE
(1)
PACKAGE SIZE
(2)
BODY SIZE
(3) per JESD 17 DBV (SOT-23, 5) 2.9mm × 2.8mm 2.9mm × 1.6mm SN74LVC1G16
2 Applications
DCK (SOT-SC70, 5) 2mm × 2.1mm 2mm × 1.25mm • Combining power good signals (1) For more information, see Section 11. • Enable digital signals (2) The package size (length × width) is a nominal value and includes pins, where applicable. (3) The body size (length × width) is a nominal value and does not include pins. A Y
Logic Diagram
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Pin Configuration and Functions 5 Specifications 5.1 Absolute Maximum Ratings 5.2 ESD Ratings 5.3 Recommended Operating Conditions 5.4 Thermal Information 5.5 Electrical Characteristics 5.6 Switching Characteristics 5.7 Typical Characteristics 6 Parameter Measurement Information 7 Overview 8 Functional Block Diagram 9 Detailed Description 9.1 Feature Description 9.1.1 Open-Drain CMOS Outputs 9.1.2 CMOS Schmitt-Trigger Inputs 9.1.3 Clamp Diode Structure 10 Application and Implementation 10.1 Application Information 10.2 Typical Application 10.2.1 Design Requirements 10.2.1.1 Power Considerations 10.2.1.2 Input Considerations 10.2.1.3 Output Considerations 10.2.2 Detailed Design Procedure 10.3 Application Curves 10.4 Power Supply Recommendations 10.5 Layout 10.5.1 Layout Guidelines 10.5.2 Layout Example 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation 11.2 Receiving Notification of Documentation Updates 11.3 Support Resources 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Revision History 13 Mechanical, Packaging, and Orderable Information