Datasheet SKY53510 (Skyworks) - 6
| 制造商 | Skyworks |
| 描述 | 10-Output Ulta Low Additive Jitter Clock Buffer |
| 页数 / 页 | 51 / 6 — DATA SHEET. SKY53510/SKY53580/SKY53540. 1.2. SKY53580 6x6 mm 40-QFN Pin … |
| 文件格式/大小 | PDF / 5.1 Mb |
| 文件语言 | 英语 |
DATA SHEET. SKY53510/SKY53580/SKY53540. 1.2. SKY53580 6x6 mm 40-QFN Pin Descriptions. GND. PAD
该数据表的模型线
文件文字版本
DATA SHEET SKY53510/SKY53580/SKY53540 1.2. SKY53580 6x6 mm 40-QFN Pin Descriptions
1 1 F C TA E UT TB U b DO 1 U O FO 1 D E K K O GND SF OE_R VD R VD CL CL SF GND
40 39 38 37 36 35 34 33 32 31
Q0
1 30
Q4 Q0b
2 29
Q4b VDDOA
3 28
VDDOB Q1
4 27
Q5 Q1b
5 GND 26
Q5b VDDOA
6 PAD 25
VDDOB Q2
7 24
Q6 Q2b
8 23
Q6b Q3
9 22
Q7 Q3b
10 21
Q7b
11 12 13 14 15 16 17 18 19 20
0 D 0 b 0 XA XB L0 K 0 L1 D TA VD SE CL K TB U SE _ GN CL _ U O K K O SF CL CL SF
Figure 3. SKY53580 6x6 mm 40-QFN Pinout Table 2. SKY53580 6x6 mm 40-QFN Pin Descriptions Pin Name Type1 Description
1 Q0 O Output Clock 0. 2 Q0b O Output Clock 0 (complement). 3 VDDOA P Output voltage supply-Bank A (Outputs: Q0 to Q3). Bypass with 0.1 µF capacitor and place as close to the VDDOA pin as possible. 4 Q1 O Output Clock 1. 5 Q1b O Output Clock 1 (complement). Output voltage supply-Bank A (Outputs: Q0 to Q3). 6 VDDOA P Bypass with 0.1 µF capacitor and place as close to the VDDOA pin as possible. 7 Q2 O Output Clock 2. 8 Q2b O Output Clock 2 (complement). 9 Q3 O Output Clock 3. 10 Q3b O Output Clock 3 (complement). 11 SFOUTA0 I Output signal format control pin for Bank A. SFOUTA0 contains an internal pull-down resistor. 12 VDD P Core voltage supply. Bypass with 0.1 µF capacitor placed as close to the VDD pin as possible. 13 XA I Crystal input. Can also be driven by a XO, TCXO, or other external single-ended clock. Crystal output. When a crystal is not used, and XA is used as an input, 14 XB O this pin should be left floating. Mux input select pin. 15 CLK_SEL0 I CLK_SEL0 contains an internal pull-down resistor. Skyworks Solutions, Inc. • Phone [949] 231-3000 • sales@skyworksinc.com • www.skyworksinc.com 207106A • Skyworks Proprietary Information • Products and Product Information are Subject to Change without Notice 6 August 1, 2025 Document Outline Key Features 1. Pin Descriptions 1.1. SKY53510 7x7 mm 48-QFN Pin Descriptions 1.2. SKY53580 6x6 mm 40-QFN Pin Descriptions 1.3. SKY53540 5x5 mm 32-QFN Pin Descriptions 2. Detailed Description 2.1. Overview 2.2. Block Diagrams 2.3. Modes of Operation 2.3.1. Input Clock Stage 2.3.2. Clock Outputs 3. Applications Information 3.1. Driving Clock Inputs (CLK0/CLK1) 3.2. Crystal Interface (XA/XB) 3.3. Clock Output Termination 3.3.1. DC-Coupled Differential Output Driver Terminations 3.3.2. AC-Coupled Differential Output Driver Terminations 4. Power Supply (VDD and VDDOx) 4.1. Power Supply Sequencing 5. Electrical Specifications 6. Typical Performance Characteristics 7. Package and Handling Information 7.1. 48-QFN Package Diagram 7.2. 40-QFN Package Diagram 7.3. 32-QFN Package Diagram 8. Land Patterns 8.1. 48-QFN Land Pattern 8.2. 40-QFN Land Pattern 8.3. 32-QFN Land Pattern 9. Top Markings 9.1. SKY53510/80/40 Top Markings 10. Ordering Guide 11. Revision History
1 1 F C TA E UT TB U b DO 1 U O FO 1 D E K K O GND SF OE_R VD R VD CL CL SF GND
40 39 38 37 36 35 34 33 32 31
Q0
1 30
Q4 Q0b
2 29
Q4b VDDOA
3 28
VDDOB Q1
4 27
Q5 Q1b
5 GND 26
Q5b VDDOA
6 PAD 25
VDDOB Q2
7 24
Q6 Q2b
8 23
Q6b Q3
9 22
Q7 Q3b
10 21
Q7b
11 12 13 14 15 16 17 18 19 20
0 D 0 b 0 XA XB L0 K 0 L1 D TA VD SE CL K TB U SE _ GN CL _ U O K K O SF CL CL SF
Figure 3. SKY53580 6x6 mm 40-QFN Pinout Table 2. SKY53580 6x6 mm 40-QFN Pin Descriptions Pin Name Type1 Description
1 Q0 O Output Clock 0. 2 Q0b O Output Clock 0 (complement). 3 VDDOA P Output voltage supply-Bank A (Outputs: Q0 to Q3). Bypass with 0.1 µF capacitor and place as close to the VDDOA pin as possible. 4 Q1 O Output Clock 1. 5 Q1b O Output Clock 1 (complement). Output voltage supply-Bank A (Outputs: Q0 to Q3). 6 VDDOA P Bypass with 0.1 µF capacitor and place as close to the VDDOA pin as possible. 7 Q2 O Output Clock 2. 8 Q2b O Output Clock 2 (complement). 9 Q3 O Output Clock 3. 10 Q3b O Output Clock 3 (complement). 11 SFOUTA0 I Output signal format control pin for Bank A. SFOUTA0 contains an internal pull-down resistor. 12 VDD P Core voltage supply. Bypass with 0.1 µF capacitor placed as close to the VDD pin as possible. 13 XA I Crystal input. Can also be driven by a XO, TCXO, or other external single-ended clock. Crystal output. When a crystal is not used, and XA is used as an input, 14 XB O this pin should be left floating. Mux input select pin. 15 CLK_SEL0 I CLK_SEL0 contains an internal pull-down resistor. Skyworks Solutions, Inc. • Phone [949] 231-3000 • sales@skyworksinc.com • www.skyworksinc.com 207106A • Skyworks Proprietary Information • Products and Product Information are Subject to Change without Notice 6 August 1, 2025 Document Outline Key Features 1. Pin Descriptions 1.1. SKY53510 7x7 mm 48-QFN Pin Descriptions 1.2. SKY53580 6x6 mm 40-QFN Pin Descriptions 1.3. SKY53540 5x5 mm 32-QFN Pin Descriptions 2. Detailed Description 2.1. Overview 2.2. Block Diagrams 2.3. Modes of Operation 2.3.1. Input Clock Stage 2.3.2. Clock Outputs 3. Applications Information 3.1. Driving Clock Inputs (CLK0/CLK1) 3.2. Crystal Interface (XA/XB) 3.3. Clock Output Termination 3.3.1. DC-Coupled Differential Output Driver Terminations 3.3.2. AC-Coupled Differential Output Driver Terminations 4. Power Supply (VDD and VDDOx) 4.1. Power Supply Sequencing 5. Electrical Specifications 6. Typical Performance Characteristics 7. Package and Handling Information 7.1. 48-QFN Package Diagram 7.2. 40-QFN Package Diagram 7.3. 32-QFN Package Diagram 8. Land Patterns 8.1. 48-QFN Land Pattern 8.2. 40-QFN Land Pattern 8.3. 32-QFN Land Pattern 9. Top Markings 9.1. SKY53510/80/40 Top Markings 10. Ordering Guide 11. Revision History