Datasheet AP6A255Q (Diodes) - 10

AP6A255Q/AP6A355Q Application Information Pulse Width Modulation (PWM) Operation
The AP6A255Q/AP6A355Q device is a 5.5V-to-100V input, 2.5A/3.5A output, EMI friendly, fully integrated synchronous buck converter. Refer to the block diagram in Figure 3. The device employs constant on-time control to provide fast transient response and easy loop stabilization. At the beginning of each cycle, the one-shot pulse turns on the high-side power MOSFET, Q1, for a fixed on-time, tON. This one-shot on-pulse timing is calculated by the converter’s input voltage and output voltage to maintain a pseudo-fixed frequency over the input voltage range. When Q1 is on, the inductor current rises linearly and the device charges the output capacitor. Q1 turns off after the fixed on-time expires, and the free-wheeling power Diode, D1, conducts. Once the output voltage drops below the output regulation, the one-shot timer is then reset and Q1 turns on again. The on-time is inversely proportional to the input voltage and directly proportional to the output voltage. It is calculated by the following equation: 𝐕𝐎𝐔𝐓 𝐭𝐎𝐍 =
Eq. 1
𝐕𝐈𝐍 ∙ 𝐟𝐒𝐖 Where: • VIN is the input voltage • VOUT is the output voltage • fSW is the switching frequency The off-time duration is tOFF and starts after the on-time expires. The off-time expires when the feedback voltage decreases below the reference voltage, which then triggers the on-time duration to start again. The minimum off-time is 200ns typically.
Power Diode Selection
The AP6A255Q/AP6A355Q requires an external free-wheeling diode between SW and GND. The diode must have a reverse voltage rating equal to or greater than VIN maximum, preferably +25% higher. The peak current rating of the diode must be greater than the maximum peak inductor current. Schottky diodes are good choice for the power diode due to their low-forward voltage property, but careful consideration of its reverse leakage current.
Enable and Disable
When disabled, the device shutdown supply current is only 5.6μA. When applying a voltage greater than the EN logic high threshold (typical 1.22V, rising), the AP6A255Q/AP6A355Q enables all functions, and the device initiates the soft-start phase. An internal 0.3µA pullup current source connected from the internal LDO-regulated VCC to the EN pin guarantees that if EN is left floating, the device is still automatically enabled once the voltage reaches the EN logic high threshold. The AP6A255Q/AP6A355Q has a built-in 4ms soft-start time to prevent output voltage overshot and inrush current. When the EN voltage falls below its logic low threshold (typical 1.24V, falling), the internal SS voltage discharges to ground and device operation is disabled. The EN pin can also be used to program the undervoltage lockout thresholds. Undervoltage lockout is implemented to prevent the IC from insufficient input voltages. The AP6A255Q/AP6A355Q device has a UVLO comparator that monitors the input voltage and the internal bandgap reference. The AP6A255Q/AP6A355Q is disabled if the input voltage falls below 3.6V. In this UVLO event, both the high-side and low-side power MOSFETs turn off. Some applications may desire higher VIN UVLO threshold voltages than is provided by the default setup. A 1.8µA hysteresis pullup current source on the EN pin along with an external resistive divider (R3 and R4) configures the VIN UVLO threshold voltages as shown in Figure 24.
VIN I1 I2 0.3µ A 1.8µ A R3 EN 20k + ON 1.25V – R4 5V Figure 24. Programming UVLO
AP6A255Q/AP6A355Q 10 of 18 May 2025 Document number: DS47149 Rev. 1 - 2
www.diodes.com
© 2025 Copyright Diodes Incorporated. All Rights Reserved.