Datasheet LT3041 (Analog Devices) - 6

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LT3041 ABSOLUTE MAXIMUM RATINGS Table 2. Absolute Maximum Ratings
Stresses at or above those listed under Absolute Maximum Ratings
Parameter Value
may cause permanent damage to the product. This is a stress IN Pin Voltage ±22 V rating only; functional operation of the product at these or any other VIOC Pin Voltage1 –0.3 V to +4 V conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operat- EN/UV Pin Voltage ±22 V ing conditions for extended periods may affect product reliability. IN-to-EN/UV Differential ±22 V PG Pin Voltage1 –0.3 V, +22 V
ESD CAUTION
ILIM Pin Voltage1 –0.3 V, +1 V
ESD (electrostatic discharge) sensitive device
. Charged devi- PGFB Pin Voltage1 –0.3 V, +22 V ces and circuit boards can discharge without detection. Although PGFB Pin Current ±20 mA this product features patented or proprietary protection circuitry, SET Pin Voltage1 –0.3 V, +16 V damage may occur on devices subjected to high energy ESD. SET Pin Current2 ±20 mA Therefore, proper ESD precautions should be taken to avoid OUTS Pin Voltage1 –0.3 V, +16 V performance degradation or loss of functionality. OUTS Pin Current2 ±20 mA OUT Pin Voltage1 –0.3 V, +16 V OUT-to-OUTS Differential3 ±1.2 V IN-to-OUT Differential ±22 V IN-to-OUTS Differential ±22 V Output Short-Circuit Duration Indefinite Temperature Operating TJ Range4, A Grade –40°C to +125°C Storage Range –65°C to +150°C 1 Parasitic diodes exist internally between the VIOC, ILIM, PG, PGFB, SET, OUTS, and OUT pins and the GND pin. Do not drive the VIOC, ILIM, PG, PGFB, SET, OUTS, and OUT pins more than 0.3 V less than the GND pin during a fault condition. The VIOC, ILIM, PG, PGFB, SET, OUTS, and OUT pins must remain at a voltage more positive than GND during normal operation. 2 SET and OUTS pins are clamped using diodes and two 25 Ω series resistors. For less than 5 ms transients, this clamp circuitry can carry more than the rated current. Refer to Figure 70 and the Protection Features section for more information. 3 Maximum OUT-to-OUTS differential is guaranteed by design. 4 The LT3041 is tested and specified under pulse load conditions such that TJ ≈ TA. The LT3041 is tested at TA = 25°C. Performance of the LT3041 over the full –40°C to 125°C operating temperature range is assured by design, characterization, and correlation with statistical process controls. The LT3041 is guaranteed over the full –40°C to 125°C operating TJ range.
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Document Outline Features Applications Typical Application General Description Specifications Electrical Characteristics Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Applications Information Output Voltage Output Sensing and Stability Stability and Output Capacitance High Vibration Environments Stability and Input Capacitance PSRR and Input Capacitance Filtering High-Frequency Spikes Output Noise SET Pin (Bypass) Capacitance: Noise, PSRR, Transient Response, and Soft-Start Fast Startup EN/UV Programmable Power Good Externally Programmable Current Limit Output Overshoot Recovery Direct Paralleling for Higher Current PCB Layout Considerations High-Efficiency Linear Regulator: Voltage Input-to-Output Control (VIOC) Typical VIOC Application Thermal Considerations Calculating Junction Temperature Overload Recovery Protection Features Typical Applications Related Products Outline Dimensions Ordering Guide Evaluation Boards