Datasheet MAX5362 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 Package |
| 页数 / 页 | 13 / 4 — Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 … |
| 文件格式/大小 | PDF / 214 Kb |
| 文件语言 | 英语 |
Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 Package. TIMING CHARACTERISTICS (continued). PARAMETER
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文件文字版本
Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 Package TIMING CHARACTERISTICS (continued)
(VDD = 2.7V to 3.6V (MAX5360); VDD = 4.5V to 5.5V (MAX5361); VDD = 2.7V to 5.5V (MAX5362); RL =10kΩ, CL = 50pF, TA = TMAX to TMIN, Figure 3, unless otherwise noted. Typical values are TA = +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Setup Time for a Repeated tSU, STA 0.6 µs START Condition Data Hold Time tHD, DAT 0 0.9 µs Data Setup Time tSU, DAT 100 ns Rise Time of Both SDA and t SCL Signals r 300 ns Fall Time of Both SDA and t 300 ns SCL Signals f Setup Time for STOP Condition tSU, STO 0.6 µs Capacitive Load for Each C Bus Line b 400 pF
Note 1:
Guaranteed from code 1 to code 63.
Note 2:
The offset value extrapolated from the range over which the INL is guaranteed.
Note 3:
MAX5362, tested at VDD = 5V ±10%.
Note 4:
MAX5360, tested at VDD = 3V ±10%; MAX5361, tested at VDD = 5V ±10%.
Note 5:
Actual output voltage at full scale is 63/64 VREF.
Note 6:
Output settling time is measured by taking the code from code 1 to code 63, and from code 63 to code 1.
Note 7:
Guaranteed by design.
MAX5360/MAX5361/MAX5362 Typical Operating Characteristics
(VDD = 3V (MAX5360), VDD = 5V (MAX5361/MAX5362), TA = +25°C, unless otherwise noted.)
INTEGRAL NONLINEARITY INTEGRAL NONLINEARITY INTEGRAL NONLINEARITY vs. CODE vs. SUPPLY VOLTAGE vs. TEMPERATURE
0.030 0 0 0.025 0.020 0.015 MAX5360/1/2-01 MAX5360/1/2-02 MAX5360/1/2-03 0.010 0.005 0 -0.005 -0.025 -0.025 -0.010 INL (LSB) INL (LSB) INL (LSB) -0.015 -0.020 -0.025 -0.030 -0.035 -0.040 -0.045 -0.050 -0.050 0 25 50 75 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -40 -20 0 20 40 60 80 100 CODE SUPPLY VOLTAGE (V) TEMPERATURE (°C)
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(VDD = 2.7V to 3.6V (MAX5360); VDD = 4.5V to 5.5V (MAX5361); VDD = 2.7V to 5.5V (MAX5362); RL =10kΩ, CL = 50pF, TA = TMAX to TMIN, Figure 3, unless otherwise noted. Typical values are TA = +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Setup Time for a Repeated tSU, STA 0.6 µs START Condition Data Hold Time tHD, DAT 0 0.9 µs Data Setup Time tSU, DAT 100 ns Rise Time of Both SDA and t SCL Signals r 300 ns Fall Time of Both SDA and t 300 ns SCL Signals f Setup Time for STOP Condition tSU, STO 0.6 µs Capacitive Load for Each C Bus Line b 400 pF
Note 1:
Guaranteed from code 1 to code 63.
Note 2:
The offset value extrapolated from the range over which the INL is guaranteed.
Note 3:
MAX5362, tested at VDD = 5V ±10%.
Note 4:
MAX5360, tested at VDD = 3V ±10%; MAX5361, tested at VDD = 5V ±10%.
Note 5:
Actual output voltage at full scale is 63/64 VREF.
Note 6:
Output settling time is measured by taking the code from code 1 to code 63, and from code 63 to code 1.
Note 7:
Guaranteed by design.
MAX5360/MAX5361/MAX5362 Typical Operating Characteristics
(VDD = 3V (MAX5360), VDD = 5V (MAX5361/MAX5362), TA = +25°C, unless otherwise noted.)
INTEGRAL NONLINEARITY INTEGRAL NONLINEARITY INTEGRAL NONLINEARITY vs. CODE vs. SUPPLY VOLTAGE vs. TEMPERATURE
0.030 0 0 0.025 0.020 0.015 MAX5360/1/2-01 MAX5360/1/2-02 MAX5360/1/2-03 0.010 0.005 0 -0.005 -0.025 -0.025 -0.010 INL (LSB) INL (LSB) INL (LSB) -0.015 -0.020 -0.025 -0.030 -0.035 -0.040 -0.045 -0.050 -0.050 0 25 50 75 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -40 -20 0 20 40 60 80 100 CODE SUPPLY VOLTAGE (V) TEMPERATURE (°C)
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