Datasheet NC7SP04 (ON Semiconductor) - 4

制造商ON Semiconductor
描述TinyLogic ULP-A Inverter
页数 / 页10 / 4 — NC7SP04. AC ELECTRICAL CHARACTERISTICS. TA = 25. TA = −40. C to +85. …
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NC7SP04. AC ELECTRICAL CHARACTERISTICS. TA = 25. TA = −40. C to +85. Symbol. Parameter. Condition. VCC (V). Min. Typ. Max. Unit

NC7SP04 AC ELECTRICAL CHARACTERISTICS TA = 25 TA = −40 C to +85 Symbol Parameter Condition VCC (V) Min Typ Max Unit

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NC7SP04 AC ELECTRICAL CHARACTERISTICS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
TA = 25
°
C TA = −40
5
C to +85
5
C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ
Symbol Parameter Condition VCC (V) Min Typ Max Min Max
ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ
Unit
ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ tPLH, tPHL Propagation Delay, RL = 1 MW, CL = 10 pF 0.9 − 52.2 − − − ns ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ A to Y (Figures 3 and 4) 1.10 to 1.30 − 13.8 29.9 − 34.3 1.40 to 1.60 − 7.3 14.8 − 15.0 1.65 to 1.95 − 5.4 12.0 − 12.2 2.3 to 2.7 − 3.5 9.4 − 9.9 3.0 to 3.6 − 2.9 8.3 − 9.0 tPLH, tPHL Propagation Delay, RL = 1 MW, CL = 15 pF 0.9 − 52.9 − − − ns A to Y (Figures 3 and 4) 1.10 to 1.30 − 14.1 30.4 − 37.3 1.40 to 1.60 − 7.5 15.5 − 16.5 1.65 to 1.95 − 5.5 12.6 − 13.6 2.3 to 2.7 − 3.6 9.9 − 10.8 3.0 to 3.6 − 3.0 8.7 − 9.5 tPLH, tPHL Propagation Delay, RL = 1 MW, CL = 30 pF 0.9 − 54.8 − − − ns A to Y (Figures 3 and 4) 1.10 to 1.30 − 15.0 31.8 − 46.3 1.40 to 1.60 − 8.2 17.8 − 18.2 1.65 to 1.95 − 6.1 14.4 − 15.9 2.3 to 2.7 − 3.9 11.3 − 12.8 3.0 to 3.6 − 3.3 9.2 − 10.7
CAPACITIVE CHARACTERISTICS Symbol Parameter Test Condition Typical (TA = 25
°
C) Unit
CIN Input Capacitance VCC = 0 V 2.0 pF CPD Power Dissipation Capacitance (Note 5) f = 10 MHz, VCC = 0.9 to 3.6 V, VIN = 0 V or VCC 8.0 pF 5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption: P 2 D = CPD VCC fin + ICC VCC. OPEN
Test Switch Position
2 x VCC GND tPLH / tPHL Open tPLZ / tPZL 2 x VCC R1 INPUT tPHZ / tPZH GND DUT OUTPUT RT RL CL* CL includes probe and jig capacitance RT is ZOUT of pulse generator (typically 50 W) f = 1 MHz
Figure 3. Test Circuit www.onsemi.com 4