Datasheet ADG5412W (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | High Voltage Latch-Up Proof, Quad SPST Switches |
| 页数 / 页 | 20 / 3 — Data Sheet. ADG5412W. SPECIFICATIONS ±15 V DUAL SUPPLY. Table 1. Typ. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 397 Kb |
| 文件语言 | 英语 |
Data Sheet. ADG5412W. SPECIFICATIONS ±15 V DUAL SUPPLY. Table 1. Typ. Parameter. Min. Max. Unit. Test Conditions/Comments
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Data Sheet ADG5412W SPECIFICATIONS ±15 V DUAL SUPPLY
VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, TA = –40°C to +125°C, unless otherwise noted.
Table 1. Typ Parameter Min
(TA = 25°C)
Max Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VDD to VSS V On Resistance, RON 9.8 16 Ω VDD = +13.5 V, VSS = −13.5 V, VS = ±10 V, IS = −10 mA; see Figure 24 On-Resistance Match Between Channels, 0.35 1.1 Ω VS = ±10 V, IS = −10 mA ∆RON On-Resistance Flatness, RFLAT (ON) 1.2 2.2 Ω VS = ±10 V, IS = −10 mA LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V Source Off Leakage, IS (Off) ±0.05 ±10 nA VS = ±10 V, VD = 10 V; see Figure 27 Drain Off Leakage, ID (Off) ±0.05 ±10 nA VS = ±10 V, VD = 10 V; see Figure 27 Channel On Leakage, ID (On), IS (On) ±0.1 ±20 nA VS = VD = ±10 V; see Figure 23 DIGITAL INPUTS Input High Voltage, VINH 2.0 V Input Low Voltage, VINL 0.8 V Input Current, IINL or IINH 0.002 ±0.1 µA VIN = VGND or VDD Digital Input Capacitance, CIN 2.5 pF DYNAMIC CHARACTERISTICS1 tON 170 262 ns VS = 10 V; see Figure 30, RL = 300 Ω, CL = 35 pF tOFF 120 182 ns VS = 10 V; see Figure 30, RL = 300 Ω, CL = 35 pF Charge Injection, QINJ 240 pC VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 31 Off Isolation −78 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 26 Channel-to-Channel Crosstalk −70 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 25 Total Harmonic Distortion + Noise 0.009 % RL = 1 kΩ, 15 V p-p, f = 20 Hz to 20 kHz; see Figure 28 −3 dB Bandwidth 167 MHz RL = 50 Ω, CL = 5 pF; see Figure 29 Insertion Loss −0.7 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 CS (Off) 18 pF VS = 0 V, f = 1 MHz CD (Off) 18 pF VS = 0 V, f = 1 MHz CD (On), CS (On) 60 pF VS = 0 V, f = 1 MHz POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V IDD 45 70 µA Digital inputs = 0 V or VDD ISS 0.001 1 µA Digital inputs = 0 V or VDD VDD/VSS ±9 ±22 V GND = 0 V 1 Guaranteed by design; not subject to production test. Rev. A | Page 3 of 20 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications ±15 V Dual Supply ±20 V Dual Supply 12 V Single Supply 36 V Single Supply Continuous Current per Channel, Sx or Dx Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Applications Information Trench Isolation Outline Dimensions Ordering Guide Automotive Products
Data Sheet ADG5412W SPECIFICATIONS ±15 V DUAL SUPPLY
VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, TA = –40°C to +125°C, unless otherwise noted.
Table 1. Typ Parameter Min
(TA = 25°C)
Max Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VDD to VSS V On Resistance, RON 9.8 16 Ω VDD = +13.5 V, VSS = −13.5 V, VS = ±10 V, IS = −10 mA; see Figure 24 On-Resistance Match Between Channels, 0.35 1.1 Ω VS = ±10 V, IS = −10 mA ∆RON On-Resistance Flatness, RFLAT (ON) 1.2 2.2 Ω VS = ±10 V, IS = −10 mA LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V Source Off Leakage, IS (Off) ±0.05 ±10 nA VS = ±10 V, VD = 10 V; see Figure 27 Drain Off Leakage, ID (Off) ±0.05 ±10 nA VS = ±10 V, VD = 10 V; see Figure 27 Channel On Leakage, ID (On), IS (On) ±0.1 ±20 nA VS = VD = ±10 V; see Figure 23 DIGITAL INPUTS Input High Voltage, VINH 2.0 V Input Low Voltage, VINL 0.8 V Input Current, IINL or IINH 0.002 ±0.1 µA VIN = VGND or VDD Digital Input Capacitance, CIN 2.5 pF DYNAMIC CHARACTERISTICS1 tON 170 262 ns VS = 10 V; see Figure 30, RL = 300 Ω, CL = 35 pF tOFF 120 182 ns VS = 10 V; see Figure 30, RL = 300 Ω, CL = 35 pF Charge Injection, QINJ 240 pC VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 31 Off Isolation −78 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 26 Channel-to-Channel Crosstalk −70 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 25 Total Harmonic Distortion + Noise 0.009 % RL = 1 kΩ, 15 V p-p, f = 20 Hz to 20 kHz; see Figure 28 −3 dB Bandwidth 167 MHz RL = 50 Ω, CL = 5 pF; see Figure 29 Insertion Loss −0.7 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 CS (Off) 18 pF VS = 0 V, f = 1 MHz CD (Off) 18 pF VS = 0 V, f = 1 MHz CD (On), CS (On) 60 pF VS = 0 V, f = 1 MHz POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V IDD 45 70 µA Digital inputs = 0 V or VDD ISS 0.001 1 µA Digital inputs = 0 V or VDD VDD/VSS ±9 ±22 V GND = 0 V 1 Guaranteed by design; not subject to production test. Rev. A | Page 3 of 20 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications ±15 V Dual Supply ±20 V Dual Supply 12 V Single Supply 36 V Single Supply Continuous Current per Channel, Sx or Dx Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Applications Information Trench Isolation Outline Dimensions Ordering Guide Automotive Products