Datasheet ADG5212, ADG5213 (Analog Devices) - 3

制造商Analog Devices
描述High Voltage Latch-Up Proof, Quad SPST Switches
页数 / 页20 / 3 — Data Sheet. ADG5212/ADG5213. SPECIFICATIONS ±15 V DUAL SUPPLY. Table 1. …
修订版A
文件格式/大小PDF / 438 Kb
文件语言英语

Data Sheet. ADG5212/ADG5213. SPECIFICATIONS ±15 V DUAL SUPPLY. Table 1. Parameter. 25°C. −40°C to +85°C. −40°C to +125°C. Unit

Data Sheet ADG5212/ADG5213 SPECIFICATIONS ±15 V DUAL SUPPLY Table 1 Parameter 25°C −40°C to +85°C −40°C to +125°C Unit

该数据表的模型线

文件文字版本

link to page 14 link to page 14 link to page 14 link to page 14 link to page 15 link to page 15 link to page 15 link to page 15 link to page 14 link to page 14 link to page 14 link to page 14
Data Sheet ADG5212/ADG5213 SPECIFICATIONS ±15 V DUAL SUPPLY
VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1. Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VDD to VSS V max On Resistance, RON 160 Ω typ VS = ±10 V, IS = −1 mA, see Figure 24 200 250 280 Ω max VDD = +13.5 V, VSS = −13.5 V On-Resistance Match Between Channels, ∆RON 2 Ω typ VS = ±10 V, IS = −1 mA 8 9 10 Ω max On-Resistance Flatness, RFLAT(ON) 38 Ω typ VS = ±10 V, IS = −1 mA 50 65 70 Ω max LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V Source Off Leakage, IS (Off) 0.01 nA typ VS = ±10 V, VD = ∓10 V, see Figure 23 0.1 0.2 0.4 nA max Drain Off Leakage, ID (Off) 0.01 nA typ VS = ±10 V, VD = ∓10 V, see Figure 23 0.1 0.2 0.4 nA max Channel On Leakage, ID (On), IS (On) 0.02 nA typ VS = VD = ±10 V, see Figure 26 0.2 0.25 0.9 nA max DIGITAL INPUTS Input High Voltage, VINH 2.0 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.002 µA typ VIN = VGND or VDD ±0.1 µA max Digital Input Capacitance, CIN 3 pF typ DYNAMIC CHARACTERISTICS1 tON 175 ns typ RL = 300 Ω, CL = 35 pF 210 255 280 ns max VS = 10 V, see Figure 30 tOFF 140 ns typ RL = 300 Ω, CL = 35 pF 170 195 215 ns max VS = 10 V, see Figure 30 Break-Before-Make Time Delay, tD 40 ns typ RL = 300 Ω, CL = 35 pF (ADG5213 Only) 20 ns min VS1 = VS2 = 10 V, see Figure 29 Charge Injection, QINJ 0.07 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF, see Figure 31 Off Isolation −80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 25 Channel-to-Channel Crosstalk −105 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 27 −3 dB Bandwidth 435 MHz typ RL = 50 Ω, CL = 5 pF, see Figure 28 Insertion Loss −6.8 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 28 CS (Off) 3 pF typ VS = 0 V, f = 1 MHz CD (Off) 5 pF typ VS = 0 V, f = 1 MHz CD (On), CS (On) 8 pF typ VS = 0 V, f = 1 MHz POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V IDD 45 µA typ Digital inputs = 0 V or VDD 55 70 µA max ISS 0.001 µA typ Digital inputs = 0 V or VDD 1 µA max VDD/VSS ±9/±22 V min/V max GND = 0 V 1 Guaranteed by design; not subject to production test. Rev. A | Page 3 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY ±20 V DUAL SUPPLY 12 V SINGLE SUPPLY 36 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR Dx ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY TRENCH ISOLATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE