Philips SemiconductorsProduct specificationN-channel enhancement modeBSN254; BSN254Avertical D-MOS transistorFEATURESPINNING - SOT54 variant • Direct interface to C-MOS, TTL, etc. DESCRIPTION • High-speed switching PINBSN254BSN254A • No secondary breakdown 1 gate source • Low RDSon. 2 drain gate 3 source drain APPLICATIONS • Line current interruptor in telephone sets • Relay, high-speed and line transformer drivers. handbook, halfpage d 123DESCRIPTION g N-channel enhancement mode vertical D-MOS transistor in a SOT54 (TO-92) variant package. MAM146 s note: various pinnings are available on request Fig.1 Simplified outline and symbol. QUICK REFERENCE DATASYMBOLPARAMETERCONDITIONSTYP.MAX.UNIT VDS drain-source voltage (DC) − 250 V ID drain current (DC) − 310 mA Ptot total power dissipation Tamb ≤ 25 °C − 1 W RDSon drain-source on-state resistance ID = 300 mA; VGS = 10 V 2.8 5 Ω VGSth gate-source threshold voltage ID = 1 mA; VDS = VGS − 2 V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT VDS drain-source voltage (DC) − 250 V VGSO gate-source voltage (DC) open drain − ±20 V ID drain current (DC) − 310 mA IDM peak drain current − 1.25 A Ptot total power dissipation Tamb ≤ 25 °C; note 1 − 1 W Tstg storage temperature −55 +150 °C Tj junction temperature − 150 °C Note 1. Device mounted on a printed-circuit board; maximum lead length 4 mm; mounting pad for drain lead minimum 10 × 10 mm. 2002 Feb 19 2 Document Outline FEATURES APPLICATIONS DESCRIPTION QUICK REFERENCE DATA PINNING LIMITING VALUES THERMAL CHARACTERISTICS CHARACTERISTICS PACKAGE OUTLINE SOT54 variant DATA SHEET STATUS DEFINITIONS DISCLAIMERS