Datasheet 74HC4060, 74HCT4060 (NXP) - 9
| 制造商 | NXP |
| 描述 | 14-stage binary ripple counter with oscillator |
| 页数 / 页 | 20 / 9 — Nexperia. 74HC4060; 74HCT4060. 14-stage binary ripple counter with … |
| 文件格式/大小 | PDF / 324 Kb |
| 文件语言 | 英语 |
Nexperia. 74HC4060; 74HCT4060. 14-stage binary ripple counter with oscillator. Symbol Parameter Conditions. 25 °C. -40 °C to. Unit
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74HC4060
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Nexperia 74HC4060; 74HCT4060 14-stage binary ripple counter with oscillator Symbol Parameter Conditions 25 °C -40 °C to -40 °C to Unit +85 °C +125 °C Min Typ Max Min Max Min Max
fmax maximum RS; see Fig. 8 frequency VCC = 2.0 V 6 26 - 4.8 - 4 - MHz VCC = 4.5 V 30 80 - 24 - 20 - MHz VCC = 5.0 V; CL = 15 pF - 87 - - - - - MHz VCC = 6.0 V 35 95 - 28 - 24 - MHz CPD power VI = GND to VCC; VCC = 5 V; [4] - 40 - - - - - pF dissipation fi = 1 MHz capacitance
74HCT4060
tpd propagation RS to Q3; see Fig. 8 [1] delay VCC = 4.5 V - 33 66 - 83 - 99 ns VCC = 5.0 V; CL = 15 pF - 31 - - - - - ns Qn to Qn+1; see Fig. 9 [2] VCC = 4.5 V - 8 16 - 20 - 24 ns VCC = 5.0 V; CL = 15 pF - 6 - - - - - ns tPHL HIGH MR to Qn; see Fig. 10 to LOW VCC = 4.5 V - 21 44 - 55 - 66 ns propagation delay VCC = 5.0 V; CL = 15 pF - 18 - - - - - ns tt transition Qn; see Fig. 8 [3] time VCC = 4.5 V - 7 15 - 19 - 22 ns tW pulse width RS (HIGH or LOW); see Fig. 8 VCC = 4.5 V 16 6 - 20 - 24 - ns MR (HIGH); see Fig. 10 VCC = 4.5 V 16 6 - 20 - 24 - ns trec recovery MR to RS; see Fig. 10 time VCC = 4.5 V 26 13 - 33 - 39 - ns fmax maximum RS; see Fig. 8 frequency VCC = 4.5 V 30 80 - 24 - 20 - MHz VCC = 5.0 V; CL = 15 pF - 88 - - - - - MHz CPD power VI = GND to VCC - 1.5 V; [4] - 40 - - - - - pF dissipation VCC = 5 V; fi = 1 MHz capacitance [1] tpd is the same as tPHL and tPLH. [2] Qn+1 is the next Qn output. [3] tt is the same as tTHL and tTLH. [4] CPD is used to determine the dynamic power dissipation (PD in μW): P 2 2 D = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C 2 L × VCC × fo) = sum of outputs. 74HC_HCT4060 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. Al rights reserved
Product data sheet Rev. 5 — 8 May 2020 9 / 20
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 5. Functional diagram 6. Pinning information 6.1. Pinning 6.2. Pin description 7. Functional description 8. Limiting values 9. Recommended operating conditions 10. Static characteristics 11. Dynamic characteristics 11.1. Waveforms and test circuit 12. RC oscillator 12.1. Timing component limitations 12.2. Typical crystal oscillator circuit 13. Package outline 14. Abbreviations 15. Revision history 16. Legal information Contents
Nexperia 74HC4060; 74HCT4060 14-stage binary ripple counter with oscillator Symbol Parameter Conditions 25 °C -40 °C to -40 °C to Unit +85 °C +125 °C Min Typ Max Min Max Min Max
fmax maximum RS; see Fig. 8 frequency VCC = 2.0 V 6 26 - 4.8 - 4 - MHz VCC = 4.5 V 30 80 - 24 - 20 - MHz VCC = 5.0 V; CL = 15 pF - 87 - - - - - MHz VCC = 6.0 V 35 95 - 28 - 24 - MHz CPD power VI = GND to VCC; VCC = 5 V; [4] - 40 - - - - - pF dissipation fi = 1 MHz capacitance
74HCT4060
tpd propagation RS to Q3; see Fig. 8 [1] delay VCC = 4.5 V - 33 66 - 83 - 99 ns VCC = 5.0 V; CL = 15 pF - 31 - - - - - ns Qn to Qn+1; see Fig. 9 [2] VCC = 4.5 V - 8 16 - 20 - 24 ns VCC = 5.0 V; CL = 15 pF - 6 - - - - - ns tPHL HIGH MR to Qn; see Fig. 10 to LOW VCC = 4.5 V - 21 44 - 55 - 66 ns propagation delay VCC = 5.0 V; CL = 15 pF - 18 - - - - - ns tt transition Qn; see Fig. 8 [3] time VCC = 4.5 V - 7 15 - 19 - 22 ns tW pulse width RS (HIGH or LOW); see Fig. 8 VCC = 4.5 V 16 6 - 20 - 24 - ns MR (HIGH); see Fig. 10 VCC = 4.5 V 16 6 - 20 - 24 - ns trec recovery MR to RS; see Fig. 10 time VCC = 4.5 V 26 13 - 33 - 39 - ns fmax maximum RS; see Fig. 8 frequency VCC = 4.5 V 30 80 - 24 - 20 - MHz VCC = 5.0 V; CL = 15 pF - 88 - - - - - MHz CPD power VI = GND to VCC - 1.5 V; [4] - 40 - - - - - pF dissipation VCC = 5 V; fi = 1 MHz capacitance [1] tpd is the same as tPHL and tPLH. [2] Qn+1 is the next Qn output. [3] tt is the same as tTHL and tTLH. [4] CPD is used to determine the dynamic power dissipation (PD in μW): P 2 2 D = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C 2 L × VCC × fo) = sum of outputs. 74HC_HCT4060 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. Al rights reserved
Product data sheet Rev. 5 — 8 May 2020 9 / 20
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 5. Functional diagram 6. Pinning information 6.1. Pinning 6.2. Pin description 7. Functional description 8. Limiting values 9. Recommended operating conditions 10. Static characteristics 11. Dynamic characteristics 11.1. Waveforms and test circuit 12. RC oscillator 12.1. Timing component limitations 12.2. Typical crystal oscillator circuit 13. Package outline 14. Abbreviations 15. Revision history 16. Legal information Contents