Datasheet ADCA3952 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | DOCSIS 3.1, Power Doubler Hybrid Module, 45 MHz to 1218 MHz |
| 页数 / 页 | 12 / 9 — Data Sheet. ADCA3952. THEORY OF OPERATION. 75Ω. BIAS. CONTROL |
| 文件格式/大小 | PDF / 336 Kb |
| 文件语言 | 英语 |
Data Sheet. ADCA3952. THEORY OF OPERATION. 75Ω. BIAS. CONTROL
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Data Sheet ADCA3952 THEORY OF OPERATION
The ADCA3952 is a 75 Ω input and output matched module The module has a bias control pin (IADJ) that can set the dc designed for CATV applications. The ADCA3952 uses cascode current consumption from low bias to the ful bias of the device field effect transistor (FET) feedback amplifiers in a Class A, by connecting a resistor from the IADJ pin to ground or by the push pul configuration. The bottom half of the cascode stages use of a positive voltage. are implemented in a single die, linear FET process that minimizes The ADCA3952 is unconditional y stable and includes transient parasitics, thereby enabling higher gain. The top devices in the and surge protection circuits for robust operation in systems cascodes are implemented using a linear GaN process able to targeting DOCSIS 3.1 and legacy DOCSIS standards. swing high RF voltages. The frequency of operation is from 45 MHz to 1218 MHz. Internally, the ADCA3952 module uses a balun to convert the
75Ω 75Ω
input signal to a balanced signal that feeds the active stages.
BIAS CONTROL
An output impedance transformer and balun combination converts the balanced GaN signals to an unbalanced 75 Ω 11 0 output. The output transformer also feeds the dc to the active 25050- stages and cancels second-order distortion products coming Figure 11. Simplified Schematic from the active devices. Rev. 0 | Page 9 of 12 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL PERFORMANCE DISTORTION DATA (40 MHz TO 550 MHz), ERROR RATES, AND TOTAL COMPOSITE POWER ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS S-PARAMETERS 9 dB TILT PERFORMANCE THEORY OF OPERATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE
The ADCA3952 is a 75 Ω input and output matched module The module has a bias control pin (IADJ) that can set the dc designed for CATV applications. The ADCA3952 uses cascode current consumption from low bias to the ful bias of the device field effect transistor (FET) feedback amplifiers in a Class A, by connecting a resistor from the IADJ pin to ground or by the push pul configuration. The bottom half of the cascode stages use of a positive voltage. are implemented in a single die, linear FET process that minimizes The ADCA3952 is unconditional y stable and includes transient parasitics, thereby enabling higher gain. The top devices in the and surge protection circuits for robust operation in systems cascodes are implemented using a linear GaN process able to targeting DOCSIS 3.1 and legacy DOCSIS standards. swing high RF voltages. The frequency of operation is from 45 MHz to 1218 MHz. Internally, the ADCA3952 module uses a balun to convert the
75Ω 75Ω
input signal to a balanced signal that feeds the active stages.
BIAS CONTROL
An output impedance transformer and balun combination converts the balanced GaN signals to an unbalanced 75 Ω 11 0 output. The output transformer also feeds the dc to the active 25050- stages and cancels second-order distortion products coming Figure 11. Simplified Schematic from the active devices. Rev. 0 | Page 9 of 12 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL PERFORMANCE DISTORTION DATA (40 MHz TO 550 MHz), ERROR RATES, AND TOTAL COMPOSITE POWER ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS S-PARAMETERS 9 dB TILT PERFORMANCE THEORY OF OPERATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE